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  1. In order for optical cavities to enable strong light-matter interactions for quantum metrology, networking, and scalability in quantum computing systems, their mirrors must have minimal losses. However, high-finesse dielectric cavity mirrors can degrade in ultra-high vacuum (UHV), increasing the challenges of upgrading to cavity-coupled quantum systems. We observe the optical degradation of high-finesse dielectric optical cavity mirrors after high-temperature UHV bake in the form of a substantial increase in surface roughness. We provide an explanation of the degradation through atomic force microscopy (AFM), X-ray fluorescence (XRF), selective wet etching, and optical measurements. We find the degradation is explained by oxygen reduction in Ta2O5followed by growth of tantalum sub-oxide defects with height to width aspect ratios near ten. We discuss the dependence of mirror loss on surface roughness and finally give recommendations to avoid degradation to allow for quick adoption of cavity-coupled systems.

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  2. Abstract

    Despite remarkable progress in the development of halide perovskite materials and devices, their integration into nanoscale optoelectronics has been hindered by a lack of control over nanoscale patterning. Owing to their tendency to degrade rapidly, perovskites suffer from chemical incompatibility with conventional lithographic processes. Here, we present an alternative, bottom-up approach for precise and scalable formation of perovskite nanocrystal arrays with deterministic control over size, number, and position. In our approach, localized growth and positioning is guided using topographical templates of controlled surface wettability through which nanoscale forces are engineered to achieve sub-lithographic resolutions. With this technique, we demonstrate deterministic arrays of CsPbBr3nanocrystals with tunable dimensions down to <50 nm and positional accuracy <50 nm. Versatile, scalable, and compatible with device integration processes, we then use our technique to demonstrate arrays of nanoscale light-emitting diodes, highlighting the new opportunities that this platform offers for perovskites’ integration into on-chip nanodevices.

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  3. null (Ed.)