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Creators/Authors contains: "Chen, Yenan"

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    This paper presents a 90.6% 48 V-1 V/150 A two-stage hybrid switched-capacitor point-of-load (PoL) converter with a 24 V intermediate bus. The first stage of the converter is a 2:1 resonant charge pump which converts the 48 V input voltage to 24 V. The second stage of the converter is a 24:1 four-phase series capacitor buck converter which is capable of delivering 150 A with two customized four-phase coupled inductor for vertical power delivery. The two-stage architecture combines the resonant switched-capacitor structure and the series capacitor buck configuration to achieve high efficiency, high power density, and voltage regulation. The effectiveness of the topology is verified by a 48 V-1 V/150 A prototype with a peak efficiency of 90.6% at 60 A and a full load efficiency of 86.2% at 150 A. The power density of the prototype is 283 W/in 3 . 
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  5. High performance computing needs high performance power electronics. This paper presents the design of an ultra-efficient series-stacked hard-disk-drive (HDD) data storage server with a multiport ac-coupled differential power processing (MAC-DPP) architecture. A large number of HDDs are connected in series and ac-coupled through a multi-winding transformer with a single flux linkage. The MAC-DPP architecture offers very low power conversion stress, can achieve extremely high efficiency, and can reduce the magnetic size and the component count. A hybrid time-sharing and distributed phase-shift control strategy is developed to modulate the ac-coupled multi-input-multi-output (MIMO) power flow. A 10-port MAC-DPP prototype was designed to support a 300 W data storage system with 10 series-stacked voltage domains. The MAC-DPP converter was tested with a 50-HDD 12TB testbench, which can maintain normal operation of the server against the worst hot-swapping scenario. The 300 W MAC-DPP prototype can achieve 99.7% peak system efficiency and over 100 W/in 3 power density. 
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