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Tectonic plate convergence is accommodated across the continental lithosphere via discrete lithospheric subduction or distributed shortening and thickening. These end-member deformation modes control intra-plate mountain building, but their selection mechanism remains unclear. The variable composition of the continental crust and lithospheric mantle, which impacts its density and rheology, can be inferred by the distribution of magnetic-indicated crustal iron. Here we demonstrate that vertically coherent pure-shear shortening dominated the active Tian Shan orogen, central Asia, based on high-resolution aeromagnetic imaging and geophysical-geodetic observations. Integrating these findings with thermomechanical collisional models reveals that the mode of intracontinental deformation depends on contrasts in lower crust composition and mantle lithosphere depletion between the converging continents and central orogenic region. Distributed shortening prevails when the converging continents have a more iron-enriched mafic crust and iron-depleted mantle lithosphere when compared to the intervening orogenic region. Conversely, continental subduction occurs without such lithospheric contrasts. This result explains how the Tian Shan orogen formed via distributed lithospheric thickening without continental subduction or underthrusting. Our interpretations imply that iron distribution in the crust correlates with lithospheric compositional, density, and rheological structure, which impacts the preservation and destruction of Earth’s continents, including long-lived cratons, during intracontinental orogeny. 

With the introduction of Cyber-Physical Systems (CPS) and Internet of Things (IoT) technologies, the automation industry is undergoing significant changes, particularly in improving production efficiency and reducing maintenance costs. Industrial automation applications often need to transmit time- and safety-critical data to closely monitor and control industrial processes. Several Ethernet-based fieldbus solutions, such as PROFINET IRT, EtherNet/IP, and EtherCAT, are widely used to ensure real-time communications in industrial automation systems. These solutions, however, commonly incorporate additional mechanisms to provide latency guarantees, making their interoperability a grand challenge. The IEEE 802.1 Time-Sensitive Networking (TSN) task group was formed to enhance and optimize IEEE 802.1 network standards, particularly for Ethernet-based networks. These solutions can be evolved and adapted for cross-industry scenarios, such as large-scale distributed industrial plants requiring multiple industrial entities to work collaboratively. This paper provides a comprehensive review of current advances in TSN standards for industrial automation. It presents the state-of-the-art IEEE TSN standards and discusses the opportunities and challenges of integrating TSN into the automation industry. Some promising research directions are also highlighted for applying TSN technologies to industrial automation applications. 

The neutral atom array has gained prominence in quantum computing for its scalability and operation fidelity. Previous works focus on fixed atom arrays (FAAs) that require extensive SWAP operations for long-range interactions. This work explores a novel architecture reconfigurable atom arrays (RAAs), also known as field programmable qubit arrays (FPQAs), which allows for coherent atom movements during circuit execution under some constraints. Such atom movements, which are unique to this architecture, could reduce the cost of longrange interactions significantly if the atom movements could be scheduled strategically. In this work, we introduce Atomique, a compilation framework designed for qubit mapping, atom movement, and gate scheduling for RAA. Atomique contains a qubit-array mapper to decide the coarse-grained mapping of the qubits to arrays, leveraging MAX k-Cut on a constructed gate frequency graph to minimize SWAP overhead. Subsequently, a qubit-atom mapper determines the fine-grained mapping of qubits to specific atoms in the array and considers load balance to prevent hardware constraint violations. We further propose a router that identifies parallel gates, schedules them simultaneously, and reduces depth. We evaluate Atomique across 20+ diverse benchmarks, including generic circuits (arbitrary, QASMBench, SupermarQ), quantum simulation, and QAOA circuits. Atomique consistently outperforms IBM Superconducting, FAA with long-range gates, and FAA with rectangular and triangular topologies, achieving significant reductions in depth and the number of two-qubit gates.