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This paper proposes a new and improved implementation of a quantum integer multiplier. Performing arithmetic computations is sometimes a necessary step in the implementation of quantum algorithms. In this work, Quantum Fourier Transform is used in order to perform scalable arithmetic in a generic bit-width quantum system. In the phase domain, addition can be implemented through accumulated controlled rotations on the qubits’ state. Leveraging this, and inspired by the classical implementation of an array multiplier, a new integer multiplier is fully designed and tested in a quantum environment. The depth of a quantum circuit is the number of computational steps necessary to completion, and it is a key parameter that reflects on the performance of the design. The new design reduces the quantum depth of the design from the exponential order of the previously proposed designs to polynomial order. 

Abstract Spectrally narrow optical resonances can be used to generate slow light, i.e., a large reduction in the group velocity. In a previous work, we developed hybrid 2D semiconductor plasmonic structures, which consist of propagating optical frequency surface-plasmon polaritons interacting with excitons in a semiconductor monolayer. Here, we use coupled exciton-surface plasmon polaritons (E-SPPs) in monolayer WSe 2 to demonstrate slow light with a 1300 fold decrease of the SPP group velocity. Specifically, we use a high resolution two-color laser technique where the nonlinear E-SPP response gives rise to ultra-narrow coherent population oscillation (CPO) resonances, resulting in a group velocity on order of 10 5  m/s. Our work paves the way toward on-chip actively switched delay lines and optical buffers that utilize 2D semiconductors as active elements. 

Abstract Interlayer excitons (IXs) in MoSe₂–WSe₂heterobilayers have generated interest as highly tunable light emitters in transition metal dichalcogenide (TMD) heterostructures. Previous reports of spectrally narrow (<1 meV) photoluminescence (PL) emission lines at low temperature have been attributed to IXs localized by the moiré potential between the TMD layers. We show that spectrally narrow IX PL lines are present even when the moiré potential is suppressed by inserting a bilayer hexagonal boron nitride (hBN) spacer between the TMD layers. We compare the doping, electric field, magnetic field, and temperature dependence of IXs in a directly contacted MoSe₂–WSe₂region to those in a region separated by bilayer hBN. The doping, electric field, and temperature dependence of the narrow IX lines are similar for both regions, but their excitonic g-factors have opposite signs, indicating that the origin of narrow IX PL is not the moiré potential. 

Abstract The semiconductor tracker (SCT) is one of the tracking systems for charged particles in the ATLAS detector. It consists of 4088 silicon strip sensor modules.During Run 2 (2015–2018) the Large Hadron Collider delivered an integrated luminosity of 156 fb -1 to the ATLAS experiment at a centre-of-mass proton-proton collision energy of 13 TeV. The instantaneous luminosity and pile-up conditions were far in excess of those assumed in the original design of the SCT detector.Due to improvements to the data acquisition system, the SCT operated stably throughout Run 2.It was available for 99.9% of the integrated luminosity and achieved a data-quality efficiency of 99.85%.Detailed studies have been made of the leakage current in SCT modules and the evolution of the full depletion voltage, which are used to study the impact of radiation damage to the modules.