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This article presents a dual-band power amplifier for 28 and 39 GHz frequency bands based on a new dual-path transformer (DPT). This DPT can provide two optimum inductive values at two different frequency bands to optimally design the matching networks for each band without using any switch circuitries. It operates as the output and input matching networks in a parallel power combiner and divider, respectively. DPT-based PA breaks the trade-off between bandwidth and performance in conventional wideband PAs by separating one whole wideband into two narrow bands providing optimum input and output matchings for each band. The DPT-based PA has two input and two output ports. One set of input and output ports is dedicated to a lower frequency band and the other set of input and outport ports can be used for a higher frequency band. Each output port can drive a separate antenna in a phased array for each frequency band. The proposed PA prototype is fabricated in a 65 nm CMOS process achieving 15.3 and 14.0 dBm of saturated output power in 28 and 39 GHz. The peak efficiency of the PA is 34.1% and 30.2% at 28 and 39 GHz frequency bands. The PA has a measured EVM with 64-QAM modulated signal in both frequency bands showing −25.03 and −25.10 dB in the low and higher frequency bands, respectively. 

Millimeter-wave (mmWave) systems require a large number of antennas, which makes the beam training challenging and time-consuming for conventional phased arrays. Recently, a true-time-delay (TTD) array-based beam training algorithm has been shown as an effective solution to overcome the training overhead in large arrays. In this paper, we present a custombuilt over-the-air (OTA) testbed to study the effects of hardware impairments on the TTD-based beam training and verify its feasibility in a real system. We proposed an orthogonal matching pursuit (OMP) based reconstruction algorithm along with a phase calibration dictionary to combat nonidealities such as strong frequency selectivity and phase misalignment in the received raw IQ signal. Post-processing results showed that with the nonideality effects properly handled, the 3D TTD beam training algorithm can achieve high AOA estimation accuracy. 

We present a low phase noise four-core triple-band voltage controlled-oscillator (VCO) with reconfigurable oscillator cores and multi-mode resonator. By activation/deactivation of oscillator cores and change of resonator impedance in three modes of operations, the proposed VCO provides complete freedom in selecting the resonance frequency for three operation bands in the mm-wave range. Compared to VCOs using switch-capacitor-bank for multi-band operation, the proposed VCO does not use any series switches with passive components in the resonator to provide a low phase noise in all three bands of operation. As a proof of concept, the proposed four-core triple-band VCO is implemented in a 65 nm CMOS process using four class-D oscillators with tail switches and a compact high-Q triple-mode resonator. The VCO oscillation frequencies center at 19, 28, and 38 GHz while providing good phase noise and low power consumption in all bands. Measured results show the total frequency tuning range (FTR) of 38.5% while the PN at 1MHz offset varies from -100.3 dBc/Hz to -106.06dBc/Hz resulting in an excellent FoMT of 199.8 dBc/Hz. 

This paper presents a low phase noise 28 GHz voltage-controlled oscillator (VCO) using a transformer-based active impedance converter to enhance the quality factor (Q) of the capacitor in the resonator. The active impedance converter can enhance the Q of a capacitor bank and varactor by 25-40% across the VCO’s tuning range. The proposed VCO is fabricated using the proposed transformer-based Q-enhancement impedance converter in a standard 65 nm CMOS process. The VCO achieves a 15.9% measured fractional frequency tuning range and phase noise of −107.6 dBc/Hz at 1 MHz offset from 28 GHz oscillation frequency while occupying only 0.05 mm2 area (200 μm × 250 μm). The VCO consumes 5.1 mW power, resulting in an excellent figure-of-merit (FoM) of 189.4 dBc/Hz and a figure-of-merit-with-area (FoMA) of 202.8 dBc/Hz. 

This paper presents a dual-band RF rectifying circuit for wireless power transmission at 1.17 GHz and 2.4 GHz. A dual-band harmonic-tuned inverse-class F/class-F mode power amplifier using a 10 W GaN device has been utilized to implement the proposed rectifier with an on-board coupler and phase shifter. The matching circuit is precisely designed so that the circuit operates in inverse class F and class F mode in the lower and upper frequency bands using dual-band harmonic tuning, respectively. Measurement results show that the rectifier circuit has 78% and 76% efficiencies at 1.17 GHz and 2.4 GHz frequency bands, respectively. To the best of the authors' knowledge, this rectifier is the first demonstration of a dual-band harmonic-tuned synchronous rectifier using a GaN HEMT device with an integrated coupler and phase-shifter for a watt-level RF input power. 

This paper presents a new continually-stepped variable gain low-noise-amplifier (CSVG-LNA) for millimeter-wave (mm-wave) 5G communications. The proposed variable-gain functionality in a two-stage LNA is achieved by incorporating a tunable-transformer at the 2nd-stage. The tunability in coupling-coefficient of the transformer allows to change the output matching of the LNA in a continuous fashion thus enabling a design of CSVG-LNA. The proposed CSVG-LNA alleviates high power consumption and large noise-figure (NF) variation problems in traditional approaches. To validate the proposed idea, we fabricated a CSVG-LNA in 65-nm CMOS process. The CSVG-LNA achieves measured 6.2dB of gain-tunability range while producing 18.2dB of peak S21 and <;4.1dB of NF 28GHz. Further, the NF variation is only ~0.2dB across the entire 6.2dB gain-tuning range. The 3dB bandwidth of CSVG-LNA is about 12GHz (22-34GHz) while it consumes only 9.8mW of dc power. The CSVG-LNA occupies a compact core area of 0.2mm2. The proposed CSVG-LNA achieves 1.5X improvement in FoM in comparison to state-of-the-arts mm-wave variable-gain CMOS LNAs.