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Creators/Authors contains: "Yasin, Atif"

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  1. ; ; ; (, 2023 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD-2023))
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  2. ; ; (, 25th International Symposium on Design and Diagnostics of Electronic Circuits and Systems)
    This paper gives a brief survey of current state-of-the-art techniques for formal verification of arithmetic circuits with suggestions for future work. In contrast to standard BDD or SAT-based approach that require a reference circuit it concentrates on Symbolic Computer Algebra (SCA) and related techniques that verify the circuits w.r.t. its abstract arithmetic specification. We examine the original computer algebra method; review the algebraic techniques of forward and backward rewriting; and AIG rewriting. We also propose a "hardware rewriting" method, which replaces algebraic rewriting by hardware synthe- sis of the circuit under verification appended with an inverse of the circuit, expecting it to be reduced to a redundant one. 
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