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Memristive devices can offer dynamic behaviour, analogue programmability, and scaling and integration capabilities. As a result, they are of potential use in the development of information processing and storage devices for both conventional and unconventional computing paradigms. Their memristive switching processes originate mainly from the modulation of the number and position of structural defects or compositional impurities—what are commonly referred to as imperfections. While the underlying mechanisms and potential applications of memristors based on traditional bulk materials have been extensively studied, memristors based on van der Waals materials have only been considered more recently. Here we examine imperfection-enabled memristive switching in van der Waals materials. We explore how imperfections— together with the inherent physicochemical properties of the van der Waals materials—create different switching mechanisms, and thus provide a range of opportunities to engineer switching behaviour in memristive devices. We also discuss the challenges involved in terms of material selection, mechanism investigation and switching uniformity control, and consider the potential of van der Waals memristors in system-level implementations of efficient computing technologies. 

In-memory computing represents an effective method for modeling complex physical systems that are typically challenging for conventional computing architectures but has been hindered by issues such as reading noise and writing variability that restrict scalability, accuracy, and precision in high-performance computations. We propose and demonstrate a circuit architecture and programming protocol that converts the analog computing result to digital at the last step and enables low-precision analog devices to perform high-precision computing. We use a weighted sum of multiple devices to represent one number, in which subsequently programmed devices are used to compensate for preceding programming errors. With a memristor system-on-chip, we experimentally demonstrate high-precision solutions for multiple scientific computing tasks while maintaining a substantial power efficiency advantage over conventional digital approaches. 

In this work, the effect of rapid thermal annealing (RTA) temperature on the ferroelectric polarization in zirconium-doped hafnium oxide (HZO) was studied. To maximize remnant polarization (2P r ), in-plane tensile stress was induced by tungsten electrodes under optimal RTA temperatures. We observed an increase in 2P r with RTA temperature, likely due to an increased proportion of the polar ferroelectric phase in HZO. The HZO capacitors annealed at 400°C did not exhibit any ferroelectric behavior, whereas the HZO capacitors annealed at 800°C became highly leaky and shorted for voltages above 1 V. On the other hand, annealing at 700 °C produced HZO capacitors with a record-high 2P r of ∼ 64 μ C cm −2  at a relatively high frequency of 111 kHz. These ferroelectric capacitors have also demonstrated impressive endurance and retention characteristics, which will greatly benefit neuromorphic computing applications. 

Abstract Different from nonvolatile memory applications, neuromorphic computing applications utilize not only the static conductance states but also the switching dynamics for computing, which calls for compact dynamical models of memristive devices. In this work, a generalized model to simulate diffusive and drift memristors with the same set of equations is presented, which have been used to reproduce experimental results faithfully. The diffusive memristor is chosen as the basis for the generalized model because it possesses complex dynamical properties that are difficult to model efficiently. A data set from statistical measurements on SiO₂:Ag diffusive memristors is collected to verify the validity of the general model. As an application example, spike‐timing‐dependent plasticity is demonstrated with an artificial synapse consisting of a diffusive memristor and a drift memristor, both modeled with this comprehensive compact model. 

Sneak path current is a fundamental issue and a major roadblock to the wide application of memristor crossbar arrays. Traditional selectors such as transistors compromise the 2D scalability and 3D stack‐ability of the array, while emerging selectors with highly nonlinear current–voltage relations contradict the requirement of a linear current–voltage relation for efficient multiplication by directly using Ohm's law. Herein, the concept of a timing selector is proposed and demonstrated, which addresses the sneak path issue with a voltage‐dependent delay time of its transient switching behavior, while preserving a linear current–voltage relationship for computation. Crossbar arrays with silver‐based diffusive memristors as the timing selectors are built and the operation principle and operational windows are experimentally demonstrated. The timing selector enables large memristor crossbar arrays that can be used to solve large‐dimension real‐world problems in machine intelligence and neuromorphic computing.