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Multiple silicon solar cell technologies have surpassed or are close to surpassing 26% efficiency. Dielectric and amorphous silicon-based passivation layers combined with minimal metal/silicon contact areas were responsible for reducing the surface saturation current density below 3 fA cm −2 . At open-circuit, in passivated contact solar cells, the recombination is mainly from fundamental mechanisms (Auger and radiative) representing over 3/4 of the total recombination. At the maximum power point, the fundamental recombination fraction can drop to half, as surface and bulk Shockley–Read–Hall step in. As a result, to further increase the performance at the operating point, it is paramount to reduce the bulk dependence and secure proper surface passivation. Bulk recombination can be mitigated either by reducing bulk defect density or by reducing the wafer thickness. We demonstrate that for commercially-viable solar-grade silicon, thinner wafers and surface saturation current densities below 1 fA cm −2 , are required to significantly increase the practical efficiency limit of solar cells up to 0.6% absolute. For a high-quality n-type bulk silicon minority-carrier lifetime of 10 ms, the optimum wafer thickness range is 40–60 μm, a very different value from 110 μm previously calculated assuming undoped substrates and solely Auger and radiative recombination. In this thickness range surface saturation current densities near 0.1 fA cm −2 are required to narrow the gap towards the fundamental efficiency limit. We experimentally demonstrate surface saturation currents below 0.5 fA cm −2 on pi/CZ/in structures across different wafer thicknesses (35–170 μm), with potential to reach open-circuit voltages close to 770 mV and bandgap-voltage offsets near 350 mV. Finally, we use the bandgap-voltage offset as a metric to compare the quality of champion experimental solar cells in the literature, for the most commercially-relevant photovoltaic cell absorbers and architectures. 

In this manuscript we study the impact of edge losses in silicon heterojunction solar cells. The edge of the cells may play a larger role due to the large diffusion length of the carriers and the presence of a high conductive layer in this type of architecture. We fabricate silicon heterojunction solar cells with different areas and masking schemes to evaluate the impact of the edge on the open-circuit voltage. We measured lower open-circuit voltages on cells which have larger ratio of cell perimeter-to-area but have similar lifetimes and similar implied characteristics. The solar cell with 6 cm^2 shows open-circuit voltage 7 mV lower than the cell with 150.3 cm^2 . Electroluminescence and photoluminescence imaging are used to evaluate the diffusion of carriers at the edges of the cells. We show the out diffusion of carriers at the edges of the cell which demonstrates the cell is affected by the surroundings