An envelope elimination and restoration (EER) transmitter that comprises a class-E power amplifier and a digitally controlled current DAC modulator is presented. A switched capacitor DAC is designed to control an open-loop transconductor that operates as a current modulator, modulating the amplitude of the current supplied to a class-E PA. Such a topology allows for increased filtering of the quantization noise that is problematic in most digital PAs (DPA). The system measurements yield a peak output power and power added efficiency (PAE) of 22.5 dBm and 23.6%, respectively. When applying a WCDMA signal, the measured EVM is 1.32% and the adjacent channel power ratio (ACPR) is -37.9 dBc, while outputting 19.9 dBm at 14.3% PAE. For an LTE signal, the measured EVM is 3.72% and the ACLR is -30.2 dBc, while outputting 18.1 dBm at 10.6% PAE.
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A multiphase switched capacitor power amplifier in 130nm CMOS
This paper presents a multiphase switched-capacitor power amplifier (MP-SCPA). Cartesian combining architectures suffer reduced output power and efficiency owing to combination of out-of-phase signals. The multiphase architecture reduces the phase difference between the basis vectors that are combined, increasing the output power and efficiency compared to the Cartesian combiners. 16 equally spaced phases are produced by a phase generator with each phase's relative amplitude weighted on the bottom plate of a capacitor array and combined on a common top plate, resulting in linear amplification. The MP-SCPA delivers a peak output power and PAE of 26 dBm and 24.9%, respectively. When amplifying an LTE signal the average output power and PAE are 20.9 dBm and 15.2%, respectively while achieving <¿¿¿30 dBc ACLR and 3.5 %-rms EVM.
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- Award ID(s):
- 1508701
- PAR ID:
- 10018057
- Date Published:
- Journal Name:
- 2016 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)
- Page Range / eLocation ID:
- 210-213
- Format(s):
- Medium: X
- Sponsoring Org:
- National Science Foundation
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