Commodity operating system (OS) kernels, such as Windows, Mac OS X, Linux, and FreeBSD, are susceptible to numerous security vulnerabilities. Their monolithic design gives successful attackers complete access to all application data and system resources. Shielding systems such as InkTag, Haven, and Virtual Ghost protect sensitive application data from compromised OS kernels. However, such systems are still vulnerable to side-channel attacks. Worse yet, compromised OS kernels can leverage their control over privileged hardware state to exacerbate existing side channels; recent work has shown that a compromised OS kernel can steal entire documents via side channels.
This paper presents defenses against page table and last-level cache (LLC) side-channel attacks launched by a compromised OS kernel. Our page table defenses restrict the OS kernel’s ability to read and write page table pages and defend against page allocation attacks, and our LLC defenses utilize the Intel Cache Allocation Technology along with memory isolation primitives. We proto- type our solution in a system we call Apparition, building on an optimized version of Virtual Ghost. Our evaluation shows that our side-channel defenses add 1% to 18% (with up to 86% for one application) overhead to the optimized Virtual Ghost (relative to the native kernel) on real-world applications.
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Prime+Abort: A Timer-Free High-Precision L3 Cache Attack using Intel TSX
Last-Level Cache (LLC) attacks typically exploit timing
side channels in hardware, and thus rely heavily
on timers for their operation. Many proposed defenses
against such side-channel attacks capitalize on this reliance.
This paper presents PRIME+ABORT, a new cache
attack which bypasses these defenses by not depending
on timers for its function. Instead of a timing side channel,
PRIME+ABORT leverages the Intel TSX hardware
widely available in both server- and consumer-grade processors.
This work shows that PRIME+ABORT is not
only invulnerable to important classes of defenses, it
also outperforms state-of-the-art LLC PRIME+PROBE
attacks in both accuracy and efficiency, having a maximum
detection speed (in events per second) 3× higher
than LLC PRIME+PROBE on Intel’s Skylake architecture
while producing fewer false positives.
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- Award ID(s):
- 1652925
- NSF-PAR ID:
- 10053303
- Date Published:
- Journal Name:
- Usenix Security
- Page Range / eLocation ID:
- 51-67
- Format(s):
- Medium: X
- Sponsoring Org:
- National Science Foundation
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Accepted Manuscript1.0
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- The DOI is not currently available.
