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1. Covering Test Holes of Functional Broadside Tests

   https://doi.org/10.1145/3441282  

   Pomeranz, Irith ( February 2021 , ACM Transactions on Design Automation of Electronic Systems)

   null (Ed.)

   Functional broadside tests were developed to avoid overtesting of delay faults. The tests achieve this goal by creating functional operation conditions during their functional capture cycles. To increase the achievable fault coverage, close-to-functional scan-based tests are allowed to deviate from functional operation conditions. This article suggests that a more comprehensive functional broadside test set can be obtained by replacing target faults that cannot be detected with faults that have similar (but not identical) detection conditions. A more comprehensive functional broadside test set has the advantage that it still maintains functional operation conditions. It covers the test holes created when target faults cannot be detected by detecting similar faults. The article considers the case where the target faults are transition faults. When a standard transition fault, with an extra delay of a single clock cycle, cannot be detected, an unspecified transition fault is used instead. An unspecified transition fault captures the behaviors of transition faults with different extra delays. When this fault cannot be detected, a stuck-at fault is used instead. A stuck-at fault has some of the detection conditions of a transition fault. Multicycle functional broadside tests are used to allow unspecified transition faults to be detected. As a by-product, test compaction also occurs. The structure of the test generation procedure accommodates the complexity of producing functional broadside tests by considering the target as well as replacement faults together. Experimental results for benchmark circuits demonstrate the fault coverage improvements achieved, and the effect on the number of tests. 

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2. Equivalent Faults under Launch-on-Shift (LOS) Tests with Equal Primary Input Vectors

   https://doi.org/10.1145/3440013  

   Pomeranz, Irith ( April 2021 , ACM Transactions on Design Automation of Electronic Systems)

   null (Ed.)

   A recent work showed that it is possible to transform a single-cycle test for stuck-at faults into a launch-on-shift (LOS) test that is guaranteed to detect the same stuck-at faults without any logic or fault simulation. The LOS test also detects transition faults. This was used for obtaining a compact LOS test set that detects both types of faults. In the scenario where LOS tests are used for both stuck-at and transition faults, this article observes that, under certain conditions, the detection of a stuck-at fault guarantees the detection of a corresponding transition fault. This implies that the two faults are equivalent under LOS tests. Equivalence can be used for reducing the set of target faults for test generation and test compaction. The article develops this notion of equivalence under LOS tests with equal primary input vectors and provides an efficient procedure for identifying it. It presents experimental results to demonstrate that such equivalences exist in benchmark circuits, and shows an unexpected effect on a test compaction procedure. 

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3. Built-in Self-Test and Fault Localization for Inter-Layer Vias in Monolithic 3D ICs

   https://doi.org/10.1145/3464430  

   Chaudhuri, Arjun ; Banerjee, Sanmitra ; Kim, Jinwoo ; Park, Heechun ; Ku, Bon Woong ; Kannan, Sukeshwar ; Chakrabarty, Krishnendu ; Lim, Sung Kyu ( January 2022 , ACM Journal on Emerging Technologies in Computing Systems)

   Monolithic 3D (M3D) integration provides massive vertical integration through the use of nanoscale inter-layer vias (ILVs). However, high integration density and aggressive scaling of the inter-layer dielectric make ILVs especially prone to defects. We present a low-cost built-in self-test (BIST) method that requires only two test patterns to detect opens, stuck-at faults, and bridging faults (shorts) in ILVs. We also propose an extended BIST architecture for fault detection, called Dual-BIST, to guarantee zero ILV fault masking due to single BIST faults and negligible ILV fault masking due to multiple BIST faults. We analyze the impact of coupling between adjacent ILVs arranged in a 1D array in block-level partitioned designs. Based on this analysis, we present a novel test architecture called Shared-BIST with the added functionality of localizing single and multiple faults, including coupling-induced faults. We introduce a systematic clustering-based method for designing and integrating a delay bank with the Shared-BIST architecture for testing small-delay defects in ILVs with minimal yield loss. Simulation results for four two-tier M3D benchmark designs highlight the effectiveness of the proposed BIST framework. 

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4. Covering Undetected Transition Fault Sites with Optimistic Unspecified Transition Faults under Multicycle Tests

   Pomeranz, I ( May 2018 , European Test Symposium)

   When a transition fault test set leaves undetected transition faults because of logic redundancies, test constraints, or the existence of hard-to-detect faults, it leaves transition fault sites uncovered. For the case where multicycle tests are used, this paper explores the possibility of covering the sites of undetected transition faults by using tests for what are referred to as optimistic unspecified transition faults. For this discussion, a standard transition fault is associated with an extra delay of a single clock cycle. An unspecified transition fault captures in a single fault the behaviors of transition faults of different durations. Because faults with different durations may be detectable or undetectable independently by a multicycle test, an unspecified transition fault may be detected even if the standard transition fault at the same site is undetectable. This effect is enhanced with optimistic unspecified transition faults. The paper describes an iterative test compaction procedure for multicycle tests that supplements the set of standard transition faults with optimistic unspecified transition faults to cover the sites of undetected standard transition faults. 

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5. Adaptive Particle Filtering for Fault Detection in Partially-Observed Boolean Dynamical Systems

   https://doi.org/10.1109/TCBB.2018.2880234  

   Bahadorinejad, Arghavan ; Imani, Mahdi ; Braga-Neto, Ulisses ( November 2018 , IEEE/ACM Transactions on Computational Biology and Bioinformatics)

   We propose a novel methodology for fault detection and diagnosis in partially-observed Boolean dynamical systems (POBDS). These are stochastic, highly nonlinear, and derivative- less systems, rendering difficult the application of classical fault detection and diagnosis methods. The methodology comprises two main approaches. The first addresses the case when the normal mode of operation is known but not the fault modes. It applies an innovations filter (IF) to detect deviations from the nominal normal mode of operation. The second approach is applicable when the set of possible fault models is finite and known, in which case we employ a multiple model adaptive estimation (MMAE) approach based on a likelihood-ratio (LR) statistic. Unknown system parameters are estimated by an adaptive expectation- maximization (EM) algorithm. Particle filtering techniques are used to reduce the computational complexity in the case of systems with large state-spaces. The efficacy of the proposed methodology is demonstrated by numerical experiments with a large gene regulatory network (GRN) with stuck-at faults observed through a single noisy time series of RNA-seq gene expression measurements. 

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