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Title: Security Oriented Analog Circuit Design Using Satisfiability Modulo Theory Based Search Space Exploration
A technique to enhance the security of analog circuits using Satisfiability Modulo Theory (SMT) based design space exploration is described. The analog satisfiability (aSAT) technique takes as inputs generic circuit equations and performance constraints and, by exhaustively exploring the design space, outputs transistor sizes that satisfy the given constraints. The aSAT methodology is applied to parameter biasing obfuscation, where the width and length of a transistor are obfuscated to mask circuit properties. The proposed methodology was used in the design of a differential amplifier and an operational amplifier, where the widths and lengths determined through aSAT analysis were shown to meet the target circuit specifications. For the operational amplifier, transistor dimensions determined through aSAT analysis for a set of performance constraints were characterized and were found to meet the performance targets, however, there was a 7 MHz reduction in the gain bandwidth product. The simulated results indicate that the developed design methodology achieves a fast and accurate determination of transistor sizes for target specifications.  more » « less
Award ID(s):
1751032
NSF-PAR ID:
10093013
Author(s) / Creator(s):
;
Date Published:
Journal Name:
Government Microcircuit Applications & Critical Technology Conference
Page Range / eLocation ID:
770-774
Format(s):
Medium: X
Sponsoring Org:
National Science Foundation
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