Long, Yun, Kim, Daehyun, Lee, Edward, Saha, Priyabrata, Mudassar, Burhan Ahmad, She, Xueyuan, Khan, Asif Islam, and Mukhopadhyay, Saibal. A Ferroelectric FET based Processing-in-Memory Architecture for DNN Acceleration. Retrieved from https://par.nsf.gov/biblio/10107237. IEEE Journal on Exploratory Solid-State Computational Devices and Circuits . Web. doi:10.1109/JXCDC.2019.2923745.

Long, Yun, Kim, Daehyun, Lee, Edward, Saha, Priyabrata, Mudassar, Burhan Ahmad, She, Xueyuan, Khan, Asif Islam, & Mukhopadhyay, Saibal. A Ferroelectric FET based Processing-in-Memory Architecture for DNN Acceleration. IEEE Journal on Exploratory Solid-State Computational Devices and Circuits, (). Retrieved from https://par.nsf.gov/biblio/10107237. https://doi.org/10.1109/JXCDC.2019.2923745

Long, Yun, Kim, Daehyun, Lee, Edward, Saha, Priyabrata, Mudassar, Burhan Ahmad, She, Xueyuan, Khan, Asif Islam, and Mukhopadhyay, Saibal. "A Ferroelectric FET based Processing-in-Memory Architecture for DNN Acceleration". IEEE Journal on Exploratory Solid-State Computational Devices and Circuits (). Country unknown/Code not available. https://doi.org/10.1109/JXCDC.2019.2923745. https://par.nsf.gov/biblio/10107237.

@article{osti_10107237,
place = {Country unknown/Code not available}, title = {A Ferroelectric FET based Processing-in-Memory Architecture for DNN Acceleration}, url = {https://par.nsf.gov/biblio/10107237}, DOI = {10.1109/JXCDC.2019.2923745}, abstractNote = {}, journal = {IEEE Journal on Exploratory Solid-State Computational Devices and Circuits}, author = {Long, Yun and Kim, Daehyun and Lee, Edward and Saha, Priyabrata and Mudassar, Burhan Ahmad and She, Xueyuan and Khan, Asif Islam and Mukhopadhyay, Saibal}, }