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1. COUNTERFOIL: Verifying Provenance of Integrated Circuits using Intrinsic Package Fingerprints and Inexpensive Cameras

   Dhanuskodi, Siva Nishok; Li, Xiang; Holcomb, Daniel (August 2020, 29th USENIX Security Symposium (USENIX Security 20))

   null (Ed.)

   Counterfeit integrated circuits are responsible for billions of dollars in losses to the semiconductor industry each year, and jeopardize the reliability of critical systems that unwittingly rely on them. Counterfeit parts, which are primarily recycled, test rejects, or legitimate but regraded, have to date been found in a number of systems, including critical defense systems. In this work, we present COUNTERFOIL – an anti-counterfeiting system based on enrolling and authenticating intrinsic features of the molded packages that enclose a majority of semiconductor chips sold on the market. Our system relies on computer-readable labels, inexpensive cameras, imaging processing using OpenCV, and digital signatures, to enroll and verify chip packages. We demonstrate our approach on a dataset from over 100 chips. We show that our technique is effective and reliable for verifying provenance under a variety of settings, and evaluate the robustness of the package features by using different imaging platforms, and by wearing the chips with silicon carbide polishing grit in a rock tumbler. We show that, even if an adversary steals the exact mold used to produce an enrolled chip package, he will have limited success in being able to counterfeit the chip. 

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2. Towards the Avoidance of Counterfeit Memory: Identifying the DRAM Origin

   Bahar Talukder, B. M.; Menon, Vineetha; Ray, Biswajit; Neal, Tempestt; Rahman, Md Tauhidur (December 2020, 2020 IEEE International Symposium on Hardware Oriented Security and Trust (HOST))

   Due to globalization in the semiconductor supply chain, counterfeit dynamic random-access memory (DRAM) chips/modules have been spreading worldwide at an alarming rate. Deploying counterfeit DRAM modules into an electronic system can severely affect security and reliability domains because of their sub-standard quality, poor performance, and shorter life span. Besides, studies suggest that a counterfeit DRAM can be more vulnerable to sophisticated attacks. However, detecting counterfeit DRAMs is very challenging because of their nature and ability to pass the initial testing. In this paper, we propose a technique to identify the DRAM origin (i.e., the origin of the manufacturer and the specification of individual DRAM) to detect and prevent counterfeit DRAM modules. A silicon evaluation shows that the proposed method reliably identifies off-the-shelf DRAM modules from three major manufacturers. 

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3. Comparative analysis of Convolutional Neural network-based counterfeit detection: keras vs. Pytorch

   Balogen, E.; Wimmer, H. (April 2024, IEMTRONICS International Conference)

   Phillip Bradford, Dr. S. (Ed.)

   The proliferation of advanced printing and scanning technologies has worsened the challenge of counterfeit currency, posing a significant threat to national economies. Effective detection of counterfeit banknotes is crucial for maintaining the monetary system's integrity. This study aims to evaluate the effectiveness of two prominent Python libraries, Keras and PyTorch, in counterfeit detection using Convolutional Neural Network (CNN) image classification. We repeat our experiments over 2 data sets, one dataset depicting the 1000 denomination of the Colombian peso under UV light and the second dataset of Bangladeshi Taka notes. The comparative analysis focuses on the libraries' performance in terms of accuracy, training time, computational efficiency, and the model behavior towards datasets. The findings reveal distinct differences between Keras and PyTorch in handling CNN-based image classification, with notable implications for accuracy and training efficiency. The study underscores the importance of choosing an appropriate Python library for counterfeit detection applications, contributing to the broader field of financial security and fraud prevention. 

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4. DRAM Retention Behavior with Accelerated Aging in Commercial Chips

   https://doi.org/10.3390/app12094332  

   Bepary, Md Kawser; Talukder, Bashir Mohammad; Rahman, Md Tauhidur (May 2022, Applied Sciences)

   The cells in dynamic random access memory (DRAM) degrade over time as a result of aging, leading to poor performance and potential security vulnerabilities. With a globalized horizontal supply chain, aged counterfeit DRAMs could end up on the market, posing a significant threat if employed in critical infrastructure. In this work, we look at the retention behavior of commercial DRAM chips from real-time silicon measurements and investigate how the reliability of DRAM cells degrade with accelerated aging. We analyze the retention-based errors at three different aging points to observe the design-induced variations, analyze the pattern dependency, and explore the impacts of accelerated aging for multiple DRAM vendors. We also investigate the DRAM chips’ statistical distribution to attribute the vital wear-out effects present in DRAM. We see a continuous increase in retention error as DRAM chips age and therefore infer that the aged retention signatures can be used to differentiate recycled DRAM chips in the supply chain. We also discuss the roles of device signature in DRAM aging and aging-related security implication on DRAM row-hammer error. 

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5. Near-Field Microwave Sensing for Chip-Level Tamper Detection

   https://doi.org/10.3390/s25134188  

   Saadat_Safa, Maryam; Tajik, Shahin (July 2025, Sensors)

   Stealthy chip-level tamper attacks, such as hardware Trojan insertions or security-critical circuit modifications, can threaten modern microelectronic systems’ security. While traditional inspection and side-channel methods offer potential for tamper detection, they may not reliably detect all forms of attacks and often face practical limitations in terms of scalability, accuracy, or applicability. This work introduces a non-invasive, contactless tamper detection method employing a complementary split-ring resonator (CSRR). CSRRs, which are typically deployed for non-destructive material characterization, can be placed on the surface of the chip’s package to detect subtle variations in the impedance of the chip’s power delivery network (PDN) caused by tampering. The changes in the PDN’s impedance profile perturb the local electric near field and consequently affect the sensor’s impedance. These changes manifest as measurable variations in the sensor’s scattering parameters. By monitoring these variations, our approach enables robust and cost-effective physical integrity verification requiring neither physical contact with the chips or printed circuit board (PCB) nor activation of the underlying malicious circuits. To validate our claims, we demonstrate the detection of various chip-level tamper events on an FPGA manufactured with 28 nm technology. 

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