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Abstract New deposition techniques for amorphous oxide semiconductors compatible with silicon back end of line manufacturing are needed for 3D monolithic integration of thin‐film electronics. Here, three atomic layer deposition (ALD) processes are compared for the fabrication of amorphous zinc tin oxide (ZTO) channels in bottom‐gate, top‐contact n‐channel transistors. As‐deposited ZTO films, made by ALD at 150–200 °C, exhibit semiconducting, enhancement‐mode behavior with electron mobility as high as 13 cm2V−1s−1, due to a low density of oxygen‐related defects. ZTO deposited at 200 °C using a hybrid thermal‐plasma ALD process with an optimal tin composition of 21%, post‐annealed at 400 °C, shows excellent performance with a record high mobility of 22.1 cm2V–1s–1and a subthreshold slope of 0.29 V dec–1. Increasing the deposition temperature and performing post‐deposition anneals at 300–500 °C lead to an increased density of the X‐ray amorphous ZTO film, improving its electrical properties. By optimizing the ZTO active layer thickness and using a high‐kgate insulator (ALD Al2O3), the transistor switching voltage is lowered, enabling electrical compatibility with silicon integrated circuits. This work opens the possibility of monolithic integration of ALD ZTO‐based thin‐film electronics with silicon integrated circuits or onto large‐area flexible substrates.
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Improving the Passivation of Molybdenum Oxide Hole‐Selective Contacts with 1 nm Hydrogenated Aluminum Oxide Films for Silicon Solar Cells
The intrinsic and doped amorphous silicon layers in silicon heterojunction solar cells parasitically absorb light in the short wavelength region of the solar spectrum, lowering the generation current available to the device. Herein, a promising alternative to the hole‐selective amorphous silicon contact layers using only wide bandgap, transparent oxide materials is presented. Using thermal atomic layer deposition, a 1 nm hydrogenated aluminum oxide layer is deposited followed by a 4 nm molybdenum oxide layer on n‐type crystalline silicon. This contact stack provides an effective carrier lifetime of 1.14 ms. It is shown that the molybdenum oxide layer is successfully deposited with a high work function, which facilitates efficient hole extraction and repels majority carriers from the c‐Si surface. Then the implied open‐circuit voltage, saturation current density, and contact resistivity are recorded as a function of contact annealing temperature and show that they are relatively stable up to 200 °C.
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- PAR ID:
- 10159706
- Publisher / Repository:
- Wiley Blackwell (John Wiley & Sons)
- Date Published:
- Journal Name:
- physica status solidi (a)
- Volume:
- 217
- Issue:
- 15
- ISSN:
- 1862-6300
- Format(s):
- Medium: X
- Sponsoring Org:
- National Science Foundation
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