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Title: Towards a Reconfigurable Bit-Serial/Bit-Parallel Vector Accelerator using In-Situ Processing-In-SRAM
Award ID(s):
1740286 2008471
NSF-PAR ID:
10198893
Author(s) / Creator(s):
; ; ; ;
Date Published:
Journal Name:
2020 IEEE International Symposium on Circuits and Systems (ISCAS)
Page Range / eLocation ID:
1 to 5
Format(s):
Medium: X
Sponsoring Org:
National Science Foundation
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