The traditional von Neumann architecture limits the increase in computing efficiency and results in massive power consumption in modern computers due to the separation of storage and processing units. The novel neuromorphic computation system, an in-memory computing architecture with low power consumption, is aimed to break the bottleneck and meet the needs of the next generation of artificial intelligence (AI) systems. Thus, it is urgent to find a memory technology to implement the neuromorphic computing nanosystem. Nowadays, the silicon-based flash memory dominates non-volatile memory market, however, it is facing challenging issues to achieve the requirements of future data storage device development due to the drawbacks, such as scaling issue, relatively slow operation speed, and high voltage for program/erase operations. The emerging resistive random-access memory (RRAM) has prompted extensive research as its simple two-terminal structure, including top electrode (TE) layer, bottom electrode (BE) layer, and an intermediate resistive switching (RS) layer. It can utilize a temporary and reversible dielectric breakdown to cause the RS phenomenon between the high resistance state (HRS) and the low resistance state (LRS). RRAM is expected to outperform conventional memory device with the advantages, notably its low-voltage operation, short programming time, great cyclic stability, and good scalability. Among the materials for RS layer, indium gallium zinc oxide (IGZO) has shown attractive prospects in abundance and high atomic diffusion property of oxygen atoms, transparency. Additionally, its electrical properties can be easily modulated by controlling the stoichiometric ratio of indium and gallium as well as oxygen potential in the sputter gas. Moreover, since the IGZO can be applied to both the thin-film transistor (TFT) channel and RS layer, it has a great potential for fully integrated transparent electronics application. In this work, we proposed amorphous transparent IGZO-based RRAMs and investigated switching behaviors of the memory cells prepared with different top electrodes. First, ITO was choosing to serve as both TE and BE to achieve high transmittance. A multi-target magnetron sputtering system was employed to deposit all three layers (TE, RS, BE layers) on glass substrate. I-V characteristics were evaluated by a semiconductor parameter analyzer, and the bipolar RS feature of our RRAM devices was demonstrated by typical butterfly curves. The optical transmission analysis was carried out via a UV-Vis spectrometer and the average transmittance was around 80% out of entire devices in the visible-light wavelength range, implying high transparency. We adjusted the oxygen partial pressure during the sputtering of IGZO to optimize the property because the oxygen vacancy concentration governs the RS performance. Electrode selection is crucial and can impact the performance of the whole device. Thus, Cu TE was chosen for our second type of device because the diffusion of Cu ions can be beneficial for the formation of the conductive filament (CF). A ~5 nm SiO 2 barrier layer was employed between TE and RS layers to confine the diffusion of Cu into the RS layer. At the same time, this SiO 2 inserting layer can provide an additional interfacial series resistance in the device to lower the off current, consequently, improve the on/off ratio and whole performance. Finally, an oxygen affinity metal Ti was selected as the TE for our third type of device because the concentration of the oxygen atoms can be shifted towards the Ti electrode, which provides an oxygengettering activity near the Ti metal. This process may in turn lead to the formation of a sub-stoichiometric region in the neighboring oxide that is believed to be the origin of better performance. In conclusion, the transparent amorphous IGZO-based RRAMs were established. To tune the property of RS layer, the sputtering conditions of RS were varied. To investigate the influence of TE selections on switching performance of RRAMs, we integrated a set of TE materials, and a barrier layer on IGZO-based RRAM and compared the switch characteristics. Our encouraging results clearly demonstrate that IGZO is a promising material in RRAM applications and breaking the bottleneck of current memory technologies.
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Makerspace microfabrication of a stainless steel 3D microneedle electrode array (3D MEA) on a glass substrate for simultaneous optical and electrical probing of electrogenic cells
Microfabrication and assembly of a Three-Dimensional Microneedle Electrode Array (3D MEA) based on a glass-stainless steel platform is demonstrated involving the utilization of non-traditional “Makerspace Microfabrication” techniques featuring cost-effective, rapid fabrication and an assorted biocompatible material palette. The stainless steel microneedle electrode array was realized by planar laser micromachining and out-of-plane transitioning to have a 3D configuration with perpendicular transition angles. The 3D MEA chip is bonded onto a glass die with metal traces routed to the periphery of the chip for electrical interfacing. Confined precision drop casting (CPDC) of PDMS is used to define an insulation layer and realize the 3D microelectrodes. The use of glass as a substrate offers optical clarity allowing for simultaneous optical and electrical probing of electrogenic cells. Additionally, an interconnect using 3D printing and conductive ink casting has been developed which allows metal traces on the glass chip to be transitioned to the bottomside of the device for interfacing with commercial data acquisition/analysis equipment. The 3D MEAs demonstrate an average impedance/phase of ∼13.3 kΩ/−12.1° at 1 kHz respectively, and an average 4.2 μV noise. Lastly, electrophysiological activity from an immortal cardiomyocyte cell line was recorded using the 3D MEA demonstrating end to end device development.
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- Award ID(s):
- 1939050
- NSF-PAR ID:
- 10220954
- Date Published:
- Journal Name:
- RSC Advances
- Volume:
- 10
- Issue:
- 68
- ISSN:
- 2046-2069
- Page Range / eLocation ID:
- 41577 to 41587
- Format(s):
- Medium: X
- Sponsoring Org:
- National Science Foundation
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Abstract We present a new, robust three dimensional microfabrication method for highly parallel microfluidics, to improve the throughput of on-chip material synthesis by allowing parallel and simultaneous operation of many replicate devices on a single chip. Recently, parallelized microfluidic chips fabricated in Silicon and glass have been developed to increase the throughput of microfluidic materials synthesis to an industrially relevant scale. These parallelized microfluidic chips require large arrays (>10,000) of Through Silicon Vias (TSVs) to deliver fluid from delivery channels to the parallelized devices. Ideally, these TSVs should have a small footprint to allow a high density of features to be packed into a single chip, have channels on both sides of the wafer, and at the same time minimize debris generation and wafer warping to enable permanent bonding of the device to glass. Because of these requirements and challenges, previous approaches cannot be easily applied to produce three dimensional microfluidic chips with a large array of TSVs. To address these issues, in this paper we report a fabrication strategy for the robust fabrication of three-dimensional Silicon microfluidic chips consisting of a dense array of TSVs, designed specifically for highly parallelized microfluidics. In particular, we have developed a two-layer TSV design that allows small diameter vias (
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Abstract Objective: Flexible Electrocorticography (ECoG) electrode arrays that conform to the cortical surface and record surface field potentials from multiple brain regions provide unique insights into how computations occurring in distributed brain regions mediate behavior. Specialized microfabrication methods are required to produce flexible ECoG devices with high-density electrode arrays. However, these fabrication methods are challenging for scientists without access to cleanroom fabrication equipment. Results: Here we present a fully desktop fabricated flexible graphene ECoG array. First, we synthesized a stable, conductive ink via liquid exfoliation of Graphene in Cyrene. Next, we established a stencil-printing process for patterning the graphene ink via laser-cut stencils on flexible polyimide substrates. Benchtop tests indicate that the graphene electrodes have good conductivity of ∼1.1 × 10 3 S cm −1 , flexibility to maintain their electrical connection under static bending, and electrochemical stability in a 15 d accelerated corrosion test. Chronically implanted graphene ECoG devices remain fully functional for up to 180 d, with average in vivo impedances of 24.72 ± 95.23 kΩ at 1 kHz. The ECoG device can measure spontaneous surface field potentials from mice under awake and anesthetized states and sensory stimulus-evoked responses. Significance: The stencil-printing fabrication process can be used to create Graphene ECoG devices with customized electrode layouts within 24 h using commonly available laboratory equipment.more » « less
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A surface alloying technique is developed to enrich the internal surfaces of low‐carbon steel casting with nickel or nickel and chromium. This unique technique involves the incorporation of nickel (Ni), nickel and chromium (Ni + Cr), or stainless steel (SS) powders into a slurry, and then applying the slurry onto the surface of cores used in sand molds which comes in contact with molten metal during casting. Various properties, including coating thickness, composition, microstructural phases, surface hardness, and corrosion resistance of the surface‐alloyed layer, are studied. The internal surface of the substrate metal is enriched with nickel and chromium, up to 16.32 wt% Ni or 7.79 wt% Ni and 15.85 wt% Cr. Optical microscopy shows that the surface‐enriched layer is continuous over the entire surface of the casting and ranges in thickness from 229 to 1342 μm. When alloyed with Ni and SS powders, the surface‐alloyed layers demonstrate a dendritic solidification microstructure, suggesting complete dissolution of powders in steel followed by solidification. While the substrate primarily displays pearlitic and ferritic structures, simulation and X‐ray diffraction confirm the presence of austenite and ferrite in the surface‐alloyed layer when Ni + Cr is used. Microhardness testing and corrosion studies show significant improvement after surface alloying.
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- Free Publicly Accessible Full Text
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Accepted Manuscript1.0
- Journal Article:
- https://doi.org/10.1039/d0ra06070d
