Because FPGAs outperform traditional processing cores like CPUs and GPUs in terms of performance per watt and flexibility, they are being used more and more in cloud and data center applications. There are growing worries about the security risks posed by multi-tenant sharing as the demand for hardware acceleration increases and gradually gives way to FPGA multi-tenancy in the cloud. The confidentiality, integrity, and availability of FPGA-accelerated applications may be compromised if space-shared FPGAs are made available to many cloud tenants. We propose a root of trust-based trusted execution mechanism called TrustToken to prevent harmful software-level attackers from getting unauthorized access and jeopardizing security. With safe key creation and truly random sources, TrustToken creates a security block that serves as the foundation of trust-based IP security. By offering crucial security characteristics, such as secure, isolated execution and trusted user interaction, TrustToken only permits trustworthy connection between the non-trusted third-party IP and the rest of the SoC environment. The suggested approach does this by connecting the third-party IP interface to the TrustToken Controller and running run-time checks on the correctness of the IP authorization(Token) signals. With an emphasis on software-based assaults targeting unauthorized access and information leakage, we offer a noble hardware/software architecture for trusted execution in FPGA-accelerated clouds and data centers.
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Domain Isolation in FPGA-Accelerated Cloud and Data Center Applications
Cloud and data center applications increasingly leverage FPGAs
because of their performance/watt benefits and flexibility advantages over traditional processing cores such as CPUs and GPUs.
As the rising demand for hardware acceleration gradually leads to
FPGA multi-tenancy in the cloud, there are rising concerns about
the security challenges posed by FPGA virtualization. Exposing
space-shared FPGAs to multiple cloud tenants may compromise
the confidentiality, integrity, and availability of FPGA-accelerated
applications. In this work, we present a hardware/software architecture for domain isolation in FPGA-accelerated clouds and data
centers with a focus on software-based attacks aiming at unauthorized access and information leakage. Our proposed architecture
implements Mandatory Access Control security policies from software down to the hardware accelerators on FPGA. Our experiments
demonstrate that the proposed architecture protects against such
attacks with minimal area and communication overhead.
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- Award ID(s):
- 2007320
- NSF-PAR ID:
- 10287874
- Date Published:
- Journal Name:
- Proceedings of the 2021 on Great Lakes Symposium on VLSI. 2021
- Page Range / eLocation ID:
- 283 to 288
- Format(s):
- Medium: X
- Sponsoring Org:
- National Science Foundation
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- Free Publicly Accessible Full Text
-
Accepted Manuscript1.0
- Conference Paper:
- https://doi.org/10.1145/3453688.3461527
