VLSI Hardware Architecture of Stochastic Low-rank Tensor Decomposition
- Award ID(s):
- 1932370
- NSF-PAR ID:
- 10311722
- Date Published:
- Journal Name:
- IEEE Asilomar Conference on Signals, Systems, and Computers
- Format(s):
- Medium: X
- Sponsoring Org:
- National Science Foundation
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