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1. Reliability Improvement in RRAM-based DNN for Edge Computing

   https://doi.org/10.1109/ISCAS48785.2022.9937260  

   Oli-Uz-Zaman, Md.; Khan, Saleh Ahmad; Yuan, Geng; Wang, Yanzhi; Liao, Zhiheng; Fu, Jingyan; Ding, Caiwen; Wang, Jinhui (January 2022, 2022 IEEE International Symposium on Circuits and Systems (ISCAS))

   Recently, the Resistive Random Access Memory (RRAM) has been paid more attention for edge computing applications in both academia and industry, because it offers power efficiency and low latency to perform the complex analog in-situ matrix-vector multiplication – the most fundamental operation of Deep Neural Networks (DNNs). But the Stuck at Fault (SAF) defect makes the RRAM unreliable for the practical implementation. A differential mapping method (DMM) is proposed in this paper to improve reliability by mitigate SAF defects from RRAM-based DNNs. Firstly, the weight distribution for the VGG8 model with the CIFAR10 dataset is presented and analyzed. Then the DMM is used for recovering the inference accuracies at 0.1% to 50% SAFs. The experiment results show that the DMM can recover DNNs to their original inference accuracies (90%), when the ratio of SAFs is smaller than 7.5%. And even when the SAF is in the extreme condition 50%, it is still highly efficient to recover the inference accuracy to 80%. What is more, the DMM is a highly reliable regulator to avoid power and timing overhead generated by SAFs. 

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2. Robust Deep Reservoir Computing through Reliable Memristor with Improved Heat Dissipation Capability

   https://doi.org/10.1109/TCAD.2020.3002539  

   An, Hongyu; Al-Mamun, Mohammad Shah; Orlowski, Marius K.; Liu, Lingjia; Yi, Yang (June 2020, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems)

   null (Ed.)

   Deep Neural Networks (DNNs), a brain-inspired learning methodology, requires tremendous data for training before performing inference tasks. The recent studies demonstrate a strong positive correlation between the inference accuracy and the size of the DNNs and datasets, which leads to an inevitable demand for large DNNs. However, conventional memory techniques are not adequate to deal with the drastic growth of dataset and neural network size. Recently, a resistive memristor has been widely considered as the next generation memory device owing to its high density and low power consumption. Nevertheless, its high switching resistance variations (cycle-tocycle) restrict its feasibility in deep learning. In this work, a novel memristor configuration with the enhanced heat dissipation feature is fabricated and evaluated to address this challenge. Our experimental results demonstrate our memristor reduces the resistance variation by 30% and the inference accuracy increases correspondingly in a similar range. The accuracy increment is evaluated by our Deep Delay-feed-back (Deep-DFR) reservoir computing model. The design area, power consumption, and latency are reduced by 48%, 42%, and 67%, respectively, compared to the conventional SRAM memory technique (6T). The performance of our memristor is improved at various degrees ( 13%-73%) compared to the state-of-the-art memristors. 

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3. Noise Injection Adaption: End-to-End ReRAM Crossbar Non-ideal Effect Adaption for Neural Network Mapping

   https://doi.org/10.1145/3316781.3317870  

   He, Zhezhi; Lin, Jie; Ewetz, Rickard; Yuan, Jiann-Shiun; Fan, Deliang (June 2019, Proceedings of the 56th Annual Design Automation Conference 2019)

   In this work, we investigate various non-ideal effects (Stuck-At-Fault (SAF), IR-drop, thermal noise, shot noise, and random telegraph noise)of ReRAM crossbar when employing it as a dot-product engine for deep neural network (DNN) acceleration. In order to examine the impacts of those non-ideal effects, we first develop a comprehensive framework called PytorX based on main-stream DNN pytorch framework. PytorX could perform end-to-end training, mapping, and evaluation for crossbar-based neural network accelerator, considering all above discussed non-ideal effects of ReRAM crossbar together. Experiments based on PytorX show that directly mapping the trained large scale DNN into crossbar without considering these non-ideal effects could lead to a complete system malfunction (i.e., equal to random guess) when the neural network goes deeper and wider. In particular, to address SAF side effects, we propose a digital SAF error correction algorithm to compensate for crossbar output errors, which only needs one-time profiling to achieve almost no system accuracy degradation. Then, to overcome IR drop effects, we propose a Noise Injection Adaption (NIA) methodology by incorporating statistics of current shift caused by IR drop in each crossbar as stochastic noise to DNN training algorithm, which could efficiently regularize DNN model to make it intrinsically adaptive to non-ideal ReRAM crossbar. It is a one-time training method without the request of retraining for every specific crossbar. Optimizing system operating frequency could easily take care of rest non-ideal effects. Various experiments on different DNNs using image recognition application are conducted to show the efficacy of our proposed methodology. 

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4. 256‐level honey memristor‐based in‐memory neuromorphic system

   https://doi.org/10.1049/ell2.70029  

   Uppaluru, Harshvardhan; Templin, Zoe; Khan, Mohammed_Rafeeq; Faruque, Md_Omar; Zhao, Feng; Wang, Jinhui (September 2024, Electronics Letters)

   Abstract Promising synaptic behaviour has been exhibited by memristors based on natural organic materials. Such memristor‐based neuromorphic systems offer notable benefits, including environmental sustainability, low production and disposal costs, non‐volatile storage capability, and bio/Complementary Metal‐Oxide‐Semiconductor (CMOS) compatibility. Here, a 256‐level honey memristor‐based neuromorphic system is experimentally evaluated for image recognition. In detail, first, 256‐level honey memristors are manufactured and tested based on in‐house technology; next, the non‐linear characteristics and inherent variation of honey memristor devices, which lead to imprecise weight updates and limit the inference accuracy, are investigated. Experimental results indicate that the inference accuracy of the 256‐level honey memristor‐based neuromorphic system is greater than 88% without cycle‐to‐cycle variations and 87% with cycle‐to‐cycle variations for different optimization algorithms. The overall performance of optimization algorithms with and without variation is compared in terms of energy and latency, where the momentum algorithm consistently outperforms the rest of the algorithms. This 256‐level honey memristor is a promising alternative enabling sustainable neuromorphic systems, encouraging further research into natural organic materials for neuromorphic computing. 

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5. Towards Energy-Efficient Spiking Neural Networks: A Robust Hybrid CMOS-Memristive Accelerator

   https://doi.org/10.1145/3635165  

   Nowshin, Fabiha; An, Hongyu; Yi, Yang (January 2024, ACM Journal on Emerging Technologies in Computing Systems)

   Spiking Neural Networks (SNNs) are energy-efficient artificial neural network models that can carry out data-intensive applications. Energy consumption, latency, and memory bottleneck are some of the major issues that arise in machine learning applications due to their data-demanding nature. Memristor-enabled Computing-In-Memory (CIM) architectures have been able to tackle the memory wall issue, eliminating the energy and time-consuming movement of data. In this work we develop a scalable CIM-based SNN architecture with our fabricated two-layer memristor crossbar array. In addition to having an enhanced heat dissipation capability, our memristor exhibits substantial enhancement of 10% to 66% in design area, power and latency compared to state-of-the-art memristors. This design incorporates an inter-spike interval (ISI) encoding scheme due to its high information density to convert the incoming input signals into spikes. Furthermore, we include a time-to-first-spike (TTFS) based output processing stage for its energy-efficiency to carry out the final classification. With the combination of ISI, CIM and TTFS, this network has a competitive inference speed of 2μs/image and can successfully classify handwritten digits with 2.9mW of power and 2.51pJ energy per spike. The proposed architecture with the ISI encoding scheme can achieve ∼10% higher accuracy than those of other encoding schemes in the MNIST dataset. 

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