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Title: 15.3 A 65nm 3T Dynamic Analog RAM-Based Computing-in-Memory Macro and CNN Accelerator with Retention Enhancement, Adaptive Analog Sparsity and 44TOPS/W System Energy Efficiency
Award ID(s):
1846424
NSF-PAR ID:
10323472
Author(s) / Creator(s):
; ;
Date Published:
Journal Name:
International Solid-State Circuit Conference
Page Range / eLocation ID:
240 to 242
Format(s):
Medium: X
Sponsoring Org:
National Science Foundation
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