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Title: Atomic layer deposited Pt/TiO2-SiO2 and Pt/ZrO2-SiO2 for sequential adsorption and oxidation of VOCs
Award ID(s):
1802049
NSF-PAR ID:
10325898
Author(s) / Creator(s):
; ; ; ;
Date Published:
Journal Name:
Chemical Engineering Journal
Volume:
444
Issue:
C
ISSN:
1385-8947
Page Range / eLocation ID:
136603
Format(s):
Medium: X
Sponsoring Org:
National Science Foundation
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  1. Self-aligned metal-oxide-semiconductor (MOS) capacitors are studied with several low-temperature, wet chemical silicon dioxide (SiO2) interlayers to understand their impact on electrical performance. Self-aligned MOS capacitors are fabricated with a bottom-up patterning technique that uses a poly(methyl methacrylate) brush and dopant-selective KOH etch combined with area-selective atomic layer deposition of hafnium dioxide (HfO2) and Pt. The wet chemical pretreatments used to form the SiO2 interlayer include hydrofluoric acid (HF) etch, 80 °C H2O, and SC-2. Capacitance-voltage measurements of these area-selective capacitors exhibit a HfO2 dielectric constant of ∼19, irrespective of pretreatment. After a forming gas anneal, the average interface state density decreased between 1.8 and 7.5 times. The minimum observed Dit is 1 × 1011 eV−1 cm−2 for the HF-last treatment. X-ray photoelectron spectroscopy shows an increase in stoichiometric SiO2 in the interfacial layer after the anneal. Additional carbon is also observed; however, comparison with capacitors fabricated in a nonselective process reveals minimal impact on performance. 
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