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1. Silicon photonic wavelength cross-connect with integrated MEMS switching

   https://doi.org/10.1063/1.5120063  

   Seok, Tae_Joon; Luo, Jianheng; Huang, Zhilei; Kwon, Kyungmok; Henriksson, Johannes; Jacobs, John; Ochikubo, Lane; Muller, Richard_S; Wu, Ming_C (October 2019, APL Photonics)

   We report on monolithically integrated wavelength cross-connects (WXCs) on an enhanced silicon photonic platform with integrated micro-electro-mechanical-system (MEMS) actuators. An 8 × 8 WXC with 8 wavelength channels comprising 16 echelle gratings and 512 silicon photonic MEMS switches is integrated on a 9.7 mm × 6.7 mm silicon chip. The WXC inherits the fundamental advantages of silicon photonic MEMS space switches, including low loss, broad optical bandwidth, large fabrication tolerance, and simple digital control. The WXC exhibits a low crosstalk of −30 dB, a submicrosecond switching time of 0.7 µs, and on-chip optical insertion losses varying from 8.8 dB to 16.4 dB. To our knowledge, it is the largest channel capacity (64 channels = 8 ports × 8 wavelengths) integrated WXC ever reported. 

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2. High-performance and scalable on-chip digital Fourier transform spectroscopy

   https://doi.org/10.1038/s41467-018-06773-2  

   Kita, Derek M.; Miranda, Brando; Favela, David; Bono, David; Michon, Jérôme; Lin, Hongtao; Gu, Tian; Hu, Juejun (October 2018, Nature Communications)

   Abstract On-chip spectrometers have the potential to offer dramatic size, weight, and power advantages over conventional benchtop instruments for many applications such as spectroscopic sensing, optical network performance monitoring, hyperspectral imaging, and radio-frequency spectrum analysis. Existing on-chip spectrometer designs, however, are limited in spectral channel count and signal-to-noise ratio. Here we demonstrate a transformative on-chip digital Fourier transform spectrometer that acquires high-resolution spectra via time-domain modulation of a reconfigurable Mach-Zehnder interferometer. The device, fabricated and packaged using industry-standard silicon photonics technology, claims the multiplex advantage to dramatically boost the signal-to-noise ratio and unprecedented scalability capable of addressing exponentially increasing numbers of spectral channels. We further explore and implement machine learning regularization techniques to spectrum reconstruction. Using an ‘elastic-D₁’ regularized regression method that we develop, we achieved significant noise suppression for both broad (>600 GHz) and narrow (<25 GHz) spectral features, as well as spectral resolution enhancement beyond the classical Rayleigh criterion. 

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3. A Fully-integrated Gesture and Gait Processing SoC for Rehabilitation with ADC-less Mixed-signal Feature Extraction and Deep Neural Network for Classification and Online Training

   https://doi.org/10.1109/CICC48029.2020.9075910  

   Wei, Yijie; Cao, Qiankai; Otseidu, Kofi; Hargrove, Levi; Gu, Jie (March 2020, Custom Integrated Circuits Conference)

   An ultra-low-power gesture and gait classification SoC is presented for rehabilitation application featuring (1) mixed-signal feature extraction and integrated low-noise amplifier eliminating expensive ADC and digital feature extraction, (2) an integrated distributed deep neural network (DNN) ASIC supporting a scalable multi-chip neural network for sensor fusion with distortion resiliency for low-cost front end modules, (3) onchip learning of DNN engine allowing in-situ training of user specific operations. A 12-channel 65nm CMOS test chip was fabricated with 1μW power per channel, less than 3ms computation latency, on-chip training for user-specific DNN model and multi-chip networking capability. 

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4. Silicon photonic chip for 16-channel wavelength division (de-)multiplexing in the O-band

   https://doi.org/10.1364/OE.397141  

   Davis, Jordan_A; Li, Ang; Alshamrani, Naif; Fainman, Yeshaiahu (July 2020, Optics Express)

   We experimentally demonstrate a silicon photonic chip-scale 16-channel wavelength division multiplexer (WDM) operating in the O-band. The silicon photonic chip consists of a common-input bus waveguide integrated with a sequence of 16 spectral add-drop filters implemented by 4-port contra-directional Bragg couplers and resonant cladding modulated perturbations. The combination of these features reduces the spectral bandwidth of the filters and improves the crosstalk. An apodization of the cladding modulated perturbations between the bus and the add/drop waveguides is used to optimize the strength of the coupling coefficient in the propagation direction to reduce the intra-channel crosstalk on adjacent channels. The fabricated chip was validated experimentally with a measured intra-channel crosstalk of ∼−18.9 dB for a channel spacing of 2.6 nm. The multiplexer/demultiplexer chip was also experimentally tested with a 10 Gbps data waveform. The resulting eye-pattern indicates that this approach is suitable for datacenter WDM-based interconnects in the O-band with large aggregate bandwidths. 

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5. Polylithic Integration for RF/MM-Wave Chiplets using Stitch-Chips: Modeling, Fabrication, and Characterization

   https://doi.org/10.1109/IMS30576.2020.9223887  

   Zheng, T.; Jo, P.; Rajan, S.; Bakir, M. (January 2020, IEEE MTT-S Int. Microw. Symp. (IMS))

   A polylithic integration technology is demonstrated for seamless stitching of RF and digital chiplets. In this technology, stitch-chips with compressible microinterconnects (CMIs) are used for low-loss and dense interconnection between chiplets. A testbed using fused-silica stitch-chips with integrated CMIs is demonstrated including modeling, fabrication, assembly, and characterization. A 500 µm-long stitch-chip signal link is measured to have less than 0.4 dB insertion loss up to 30 GHz. A simulated eye diagram for 1000 µm-long stitch-chip signal link has a clear opening at 50 Gbps data rate. Moreover, the S-parameters of the CMIs are extracted from this testbed and show less than 0.17 dB insertion loss up to 30 GHz. Benchmarking to silicon interposer based interconnection is also reported. 

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