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Title: PrGEMM: A Parallel Reduction SpGEMM Accelerator
Due to increasing data sparsity in scientific data sets and pruned neural networks, it becomes more challenging to compute with these kinds of sparse data sets efficiently. Several works discuss efficient sparse matrix-vector multiplication (SpMV). However, because of index irregularity in compact stored matrices, sparse matrix-vector multiplication (SpGEMM) still suffers from the trade-off between space and efficiency of computation. In this work, we propose PrGEMM, a multiple reduction scheme which (1) computes SpGEMM under compact storage format without expansion of the operands, (2) by using index lookahead, computes and compares multiple index-data pairs at the same time with no order violation of indices. We evaluate our work with the matrices with different sizes in the SuiteSparse data set. Our work can achieve 3.3x of execution cycle improvement compared to the state-of-the-art SpGEMM scheme.  more » « less
Award ID(s):
2010830
PAR ID:
10349209
Author(s) / Creator(s):
;
Date Published:
Journal Name:
GLSVLSI '22: Proceedings of the Great Lakes Symposium on VLSI 2022
Page Range / eLocation ID:
397 to 401
Format(s):
Medium: X
Sponsoring Org:
National Science Foundation
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