Zhou, Quan, Wang, Haiquan, Yu, Xiaoyan, Li, Cheng, Bai, Youhui, Yan, Feng, and Xu, Yinlong. MPress: Democratizing Billion-Scale Model Training on Multi-GPU Servers via Memory-Saving Inter-Operator Parallelism. Retrieved from https://par.nsf.gov/biblio/10410479. IEEE International Symposium on High-Performance Computer Architecture . Web. doi:10.1109/HPCA56546.2023.10071077.

Zhou, Quan, Wang, Haiquan, Yu, Xiaoyan, Li, Cheng, Bai, Youhui, Yan, Feng, & Xu, Yinlong. MPress: Democratizing Billion-Scale Model Training on Multi-GPU Servers via Memory-Saving Inter-Operator Parallelism. IEEE International Symposium on High-Performance Computer Architecture, (). Retrieved from https://par.nsf.gov/biblio/10410479. https://doi.org/10.1109/HPCA56546.2023.10071077

Zhou, Quan, Wang, Haiquan, Yu, Xiaoyan, Li, Cheng, Bai, Youhui, Yan, Feng, and Xu, Yinlong. "MPress: Democratizing Billion-Scale Model Training on Multi-GPU Servers via Memory-Saving Inter-Operator Parallelism". IEEE International Symposium on High-Performance Computer Architecture (). Country unknown/Code not available. https://doi.org/10.1109/HPCA56546.2023.10071077. https://par.nsf.gov/biblio/10410479.

@article{osti_10410479,
place = {Country unknown/Code not available}, title = {MPress: Democratizing Billion-Scale Model Training on Multi-GPU Servers via Memory-Saving Inter-Operator Parallelism}, url = {https://par.nsf.gov/biblio/10410479}, DOI = {10.1109/HPCA56546.2023.10071077}, abstractNote = {}, journal = {IEEE International Symposium on High-Performance Computer Architecture}, author = {Zhou, Quan and Wang, Haiquan and Yu, Xiaoyan and Li, Cheng and Bai, Youhui and Yan, Feng and Xu, Yinlong}, }