In the current noisy intermediate-scale quantum (NISQ) Era, Quantum Computing faces significant challenges due to noise, which severely restricts the application of computing complex algorithms. Superconducting quantum chips, one of the pioneer quantum computation technologies, introduce additional noise when moving qubits to adjacent locations for operation on designated two-qubit gates. The current compilers rely on decision models that either count the swap gates or multiply the gate errors when choosing swap paths at the routing stage. Our research has unveiled the overlooked situations for error propagations through the circuit, leading to accumulations that may affect the final output. In this paper, we propose Error Propagation-Aware Routing (EPAR), designed to enhance the compilation performance by considering accumulated errors in routing. EPAR’s effectiveness is validated through benchmarks on a 27-qubit machine and two simulated systems with different topologies. The results indicate an average success rate improvement of 10% on both real and simulated heavy hex lattice topologies, along with a 16% enhancement in a mesh topology simulation. These findings underscore the potential of EPAR to advance quantum computing in the NISQ era substantially.
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Error-Divisible Two-Qubit Gates
We introduce a simple widely applicable formalism for designing “error-divisible” two-qubit gates: a quantum gate set where fractional rotations have proportionally reduced error compared to the full entangling gate. In current noisy intermediate-scale quantum (NISQ) algorithms, performance is largely constrained by error proliferation at high circuit depths, of which two-qubit gate error is generally the dominant contribution. Further, in many hardware implementations, arbitrary two-qubit rotations must be composed from multiple two-qubit stock gates, further increasing error. This work introduces a set of cri- teria, and example wave forms and protocols to satisfy them, using superconducting qubits with tunable couplers for constructing continuous gate sets with significantly reduced leakage and dynamic ZZ errors for small-angle rotations. If implemented at scale, NISQ-algorithm performance could be significantly improved by our error-divisible gate protocols.
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- Award ID(s):
- 1653820
- PAR ID:
- 10473196
- Publisher / Repository:
- Physical Review
- Date Published:
- Journal Name:
- Physical Review Applied
- Volume:
- 19
- Issue:
- 2
- ISSN:
- 2331-7019
- Format(s):
- Medium: X
- Sponsoring Org:
- National Science Foundation
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