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Title: A 49-63 GHz Phase-locked FMCW Radar Transceiver for High Resolution Applications
This paper presents an mmWave FMCW radar that can achieve sub-centimeter-scale range resolution at 14- GHz chirp-bandwidth while maintaining the radar range beyond 50 meters. To meet the requirements on power efficiency, chirp linearity, and signal-to-noise ratio (SNR), a phase-locked steppedchirp FMCW radar architecture is introduced. Specifically, a fully integrated radar transceiver comprising an interleaved frequency-segmented phase-locked transmitter and a segmented receiver architecture with high sensitivity is presented. The proposed design addresses the limitations of conventional typeII phase-locked loops (PLLs) in extending the radar bandwidth across multiple sub-bands with identical chirp profiles. Fabricated in a 22nm FD-SOI technology, the prototype chip comprises two sub-bands with 14 GHz of free-running bandwidth and 10 GHz of phase-locked bandwidth. The system achieves -101.7 dBc/Hz phase noise at 1 MHz offset, 8 dBm of effective isotropic radiated power (EIRP), 10 dB noise figure (NF), and 362.6 mW collective power consumption of transmitter and receiver arrays.  more » « less
Award ID(s):
2233783
PAR ID:
10498849
Author(s) / Creator(s):
; ; ; ;
Editor(s):
TPC of IEEE ESSCIRC Conference
Publisher / Repository:
IEEE
Date Published:
Journal Name:
IEEE European Solid State Circuits Conference
Edition / Version:
NA
Volume:
NA
Issue:
NA
ISSN:
NA
ISBN:
978-80-8075-477-8
Page Range / eLocation ID:
509-512
Subject(s) / Keyword(s):
CMOS, FMCW radar, Coupled PLL, off-chip antenna, range resolution, stepped chirp radar.
Format(s):
Medium: X Size: 1624 kB Other: PDF
Size(s):
1624 kB
Location:
Lisbon, Portugal
Sponsoring Org:
National Science Foundation
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