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Abstract The transition towards designs which co-package electronic and photonic die together in data center switch packages has created a scaling path to Petabyte per second (Pbps) input/output (I/O) in such systems. In a co-packaged design, the scaling of bandwidth, cost, and energy will be governed by the number of optical I/O channels and the data rate per channel. While optical communication provide an opportunity to exploit wavelength division multiplexing (WDM) to scale data rate, the limited 127 µm pitch of V-groove based single mode fiber arrays and the use of active alignment and bonding for their packaging present challenges to scaling the number of optical channels. Flip-chip optical couplers which allow for low loss, broadband operation and automated passive assembly represent a solution for continued scaling. In this paper, we propose a novel scheme to vertically couple between silicon based waveguides on separate chips using graded index (GRIN) couplers in combination with an evanescent coupler. Simulation results using a 3D Finite-Difference Time-Domain (FDTD) solver are presented, demonstrating coupling losses as low as 0.35 dB for a chip-to-chip gap of 11 µm; 1-dB vertical and lateral alignment tolerances of approximately 2.45 µm and ± 2.66 µm, respectively; and a possible 1-dB bandwidth of greater than 1500 nm. These results demonstrate the potential of our coupler as a universal interface in future co-packaged optics systems.
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Low Loss Chip-to-Chip Couplers for High Density Co-Packaged Optics
An experimentally demonstrated, vertical chip-to-chip evanescent coupler between silicon nitride (Si₃N₄) and silicon (Si) is presented with the coupler loss measured to be 0.39 ± 1.06 dB at 1550 nm with a 1-dB bandwidth of 160 nm extending across the C-band, S-band, and L-band (1480-1640 nm). The average coupling loss was determined to be 0.73 dB for the 1480-1640 nm wavelength range with a ± 2σ tolerance of ± 0.92 dB. The 1-dB lateral alignment tolerance was 1.56 ± 0.14 μm at 1550 nm and the average tolerance was 1.38 ± 0.24 μm across the 1480-1640 nm wavelength regime. In addition, the average coupling loss varied by less than ± 0.35 dB and the average 1-dB alignment tolerance varied by less than ± 30 nm for temperatures varying from 23-60°C. Finally, the average coupling loss range was less than 1.5 dB range across four sets of identically packaged die. This is the first experimental demonstration of an inter-chip, passively assembled evanescent coupler using standard CMOS foundry processes for directly coupling between Si and Si₃N₄, overcoming a waveguide refractive index difference of Δn = 1.32 without requiring taper tip widths of less than 100 nm.
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- Award ID(s):
- 2236093
- PAR ID:
- 10557819
- Publisher / Repository:
- Optica Open
- Date Published:
- Format(s):
- Medium: X
- Institution:
- Optica Open
- Sponsoring Org:
- National Science Foundation
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- Free Publicly Accessible Full Text
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Accepted Manuscript1.0
- Posted Content:
- https://doi.org/10.1364/opticaopen.25852735.v1
