Jayasena, Aruna, and Mishra, Prabhat. HIVE: Scalable Hardware-Firmware Co-Verification Using Scenario-Based Decomposition and Automated Hint Extraction. Retrieved from https://par.nsf.gov/biblio/10559051. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 43.10 Web. doi:10.1109/TCAD.2024.3383961.

Jayasena, Aruna, & Mishra, Prabhat. HIVE: Scalable Hardware-Firmware Co-Verification Using Scenario-Based Decomposition and Automated Hint Extraction. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 43 (10). Retrieved from https://par.nsf.gov/biblio/10559051. https://doi.org/10.1109/TCAD.2024.3383961

Jayasena, Aruna, and Mishra, Prabhat. "HIVE: Scalable Hardware-Firmware Co-Verification Using Scenario-Based Decomposition and Automated Hint Extraction". IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 43 (10). Country unknown/Code not available: IEEE. https://doi.org/10.1109/TCAD.2024.3383961. https://par.nsf.gov/biblio/10559051.

@article{osti_10559051,
place = {Country unknown/Code not available}, title = {HIVE: Scalable Hardware-Firmware Co-Verification Using Scenario-Based Decomposition and Automated Hint Extraction}, url = {https://par.nsf.gov/biblio/10559051}, DOI = {10.1109/TCAD.2024.3383961}, abstractNote = {}, journal = {IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems}, volume = {43}, number = {10}, publisher = {IEEE}, author = {Jayasena, Aruna and Mishra, Prabhat}, }