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This content will become publicly available on January 1, 2026

Title: Analysis and Verilog-A Modeling of Floating-Gate Transistors
Award ID(s):
2210804
PAR ID:
10617990
Author(s) / Creator(s):
; ;
Publisher / Repository:
IEEE
Date Published:
Journal Name:
IEEE Open Journal of Circuits and Systems
Volume:
6
ISSN:
2644-1225
Page Range / eLocation ID:
63 to 73
Format(s):
Medium: X
Sponsoring Org:
National Science Foundation
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