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Abstract High thermal conductivity electronic materials are critical components for high-performance electronic and photonic devices as both active functional materials and thermal management materials. We report an isotropic high thermal conductivity exceeding 500 W m −1 K −1 at room temperature in high-quality wafer-scale cubic silicon carbide (3C-SiC) crystals, which is the second highest among large crystals (only surpassed by diamond). Furthermore, the corresponding 3C-SiC thin films are found to have record-high in-plane and cross-plane thermal conductivity, even higher than diamond thin films with equivalent thicknesses. Our results resolve a long-standing puzzle that the literature values of thermal conductivity for 3C-SiC are lower than the structurally more complex 6H-SiC. We show that the observed high thermal conductivity in this work arises from the high purity and high crystal quality of 3C-SiC crystals which avoids the exceptionally strong defect-phonon scatterings. Moreover, 3C-SiC is a SiC polytype which can be epitaxially grown on Si. We show that the measured 3C-SiC-Si thermal boundary conductance is among the highest for semiconductor interfaces. These findings provide insights for fundamental phonon transport mechanisms, and suggest that 3C-SiC is an excellent wide-bandgap semiconductor for applications of next-generation power electronics as both active components and substrates.

In this study, we compared the transient self-heating behavior of a homoepitaxial β-Ga2O3 MOSFET and a GaN-on-Si HEMT using nanoparticle-assisted Raman thermometry and thermoreflectance thermal imaging. The effectiveness of bottom-side and double-side cooling schemes using a polycrystalline diamond substrate and a diamond passivation layer were studied via transient thermal modeling. Because of the low thermal diffusivity of β-Ga2O3, the use of a β-Ga2O3 composite substrate (bottom-side cooling) must be augmented by a diamond passivation layer (top-side cooling) to effectively cool the device active region under both steady-state and transient operating conditions. Without no proper cooling applied, the steady-state device-to-package thermal resistance of a homoepitaxial β-Ga2O3 MOSFET is 2.6 times higher than that for a GaN-on-Si HEMT. Replacing the substrate with polycrystalline diamond (under a 6.5 μm-thick β-Ga2O3 layer) could reduce the steady-state temperature rise by 65% compared to that for a homoepitaxial β-Ga2O3 MOSFET. However, for high frequency power switching applications beyond the ~102 kHz range, bottom-side cooling (integration with a high thermal conductivity substrate) does not improve the transient thermal response of the device. Adding a diamond passivation over layer diamond not only suppresses the steadystate temperature rise, but also drastically reduces the transient temperature rise under high frequencymore »operating conditions.« less

Resistive random-access memory (RRAM) devices have been widely studied for neuromorphic, in-memory computing. One of the most studied RRAM structures consists of a titanium capping layer and a HfO_xadaptive oxide. Although these devices show promise in improving neuromorphic circuits, high variability, non-linearity, and asymmetric resistance changes limit their usefulness. Many studies have improved linearity by changing materials in or around the device, the circuitry, or the analog bias conditions. However, the impact of prior biasing conditions on the observed analog resistance change is not well understood. Experimental results in this study demonstrate that prior higher reset voltages used after forming cause a greater resistance change during subsequent identical analog pulsing. A multiphysics finite element model suggests that this greater analog resistance change is due to a higher concentration of oxygen ions stored in the titanium capping layer with increasing magnitude of the reset voltage. This work suggests that local ion concentration variations in the titanium capping layer of just tens of atoms cause significant resistance variation during analog operation.

Abstract This review introduces relevant nanoscale thermal transport processes that impact thermal abatement in power electronics applications. Specifically, we highlight the importance of nanoscale thermal transport mechanisms at each layer in material hierarchies that make up modern electronic devices. This includes those mechanisms that impact thermal transport through: (1) substrates, (2) interfaces and 2-D materials and (3) heat spreading materials. For each material layer, we provide examples of recent works that (1) demonstrate improvements in thermal performance and/or (2) improve our understanding of the relevance of nanoscale thermal transport across material junctions. We end our discussion by highlighting several additional applications that have benefited from a consideration of nanoscale thermal transport phenomena, including RF electronics and neuromorphic computing.