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Abstract Incorporation of colloidal quantum emitters into silicon-based photonic devices would enable major advances in quantum optics. However, deterministic placement of individual sub-10 nm colloidal particles onto micron-sized photonic structures with nanometer-scale precision remains an outstanding challenge. Here, we introduce Cavity-Shape Modulated Origami Placement (CSMOP) that leverages the structural programmability of DNA origami to precisely deposit colloidal nanomaterials within lithographically-defined resist cavities. CSMOP enables clean and accurate patterning of origami templates onto photonic chips with high yields. Soft-silicification-passivation stabilizes deposited origamis, while preserving their binding sites to attach and align colloidal quantum rods (QRs) to control their nanoscale positions and emission polarization. We demonstrate QR integration with photonic device structures including waveguides, micro-ring resonators, and bullseye photonic cavities. CSMOP therefore offers a general platform for the integration of colloidal quantum materials into photonic circuits, with broad potential to empower quantum science and technology. 

An experimentally demonstrated, vertical chip-to-chip evanescent coupler between silicon nitride (Si₃N₄) and silicon (Si) is presented with the coupler loss measured to be 0.39 ± 1.06 dB at 1550 nm with a 1-dB bandwidth of 160 nm extending across the C-band, S-band, and L-band (1480-1640 nm). The average coupling loss was determined to be 0.73 dB for the 1480-1640 nm wavelength range with a ± 2σ tolerance of ± 0.92 dB. The 1-dB lateral alignment tolerance was 1.56 ± 0.14 μm at 1550 nm and the average tolerance was 1.38 ± 0.24 μm across the 1480-1640 nm wavelength regime. In addition, the average coupling loss varied by less than ± 0.35 dB and the average 1-dB alignment tolerance varied by less than ± 30 nm for temperatures varying from 23-60°C. Finally, the average coupling loss range was less than 1.5 dB range across four sets of identically packaged die. This is the first experimental demonstration of an inter-chip, passively assembled evanescent coupler using standard CMOS foundry processes for directly coupling between Si and Si₃N₄, overcoming a waveguide refractive index difference of Δn = 1.32 without requiring taper tip widths of less than 100 nm. 

As silicon photonics transitions from research to commercial deployment, packaging solutions that efficiently couple light into highly compact and functional sub-micrometer silicon waveguides are imperative but remain challenging. The 220 nm silicon-on-insulator (SOI) platform, poised to enable large-scale integration, is the most widely adopted by foundries, resulting in established fabrication processes and extensive photonic component libraries. The development of a highly efficient, scalable, and broadband coupling scheme for this platform is therefore of paramount importance. Leveraging two-photon polymerization (TPP) and a deterministic free-form micro-optics design methodology based on the Fermat’s principle, this work demonstrates an ultra-efficient and broadband 3-D coupler interface between standard SMF-28 single-mode fibers and silicon waveguides on the 220 nm SOI platform. The coupler achieves a low coupling loss of 0.8 dB for the fundamental TE mode, along with 1 dB bandwidth exceeding 180 nm. The broadband operation enables diverse bandwidth-driven applications ranging from communications to spectroscopy. Furthermore, the 3-D free-form coupler also enables large tolerance to fiber misalignments and manufacturing variability, thereby relaxing packaging requirements toward cost reduction capitalizing on standard electronic packaging process flows. 

Abstract Ferrimagnetic iron garnets enable magnetic and magneto‐optical functionality in silicon photonics and electronics. However, garnets require high‐temperature processing for crystallization which can degrade other devices on the wafer. Here bismuth‐substituted yttrium and terbium iron garnet (Bi‐YIG and Bi‐TbIG) films are demonstrated with good magneto‐optical performance and perpendicular magnetic anisotropy (PMA) crystallized by a microheater built on a Si chip or by rapid thermal annealing. The Bi‐TbIG film crystallizes on Si at 873 K without a seed layer and exhibits good magneto‐optical properties with Faraday rotation (FR) of −1700 deg cm⁻¹. The Bi‐YIG film also crystallizes on Si and fused SiO₂at 873 K without a seed layer. Rapidly cooled films exhibit PMA due to the tensile stress caused by the thermal expansion mismatch with the substrates, increasing the magnetoelastic anisotropy by 4 kJ m⁻³versus slow‐cooled films. Annealing in the air for 15 s using the microheater yields fully crystallized Bi‐TbIG on the Si chip. 

Abstract Chalcogenide optical phase change materials (PCMs) have garnered significant interest for their growing applications in programmable photonics, optical analog computing, active metasurfaces, and beyond. Limited endurance or cycling lifetime is however increasingly becoming a bottleneck toward their practical deployment for these applications. To address this issue, a systematic study elucidating the cycling failure mechanisms of Ge₂Sb₂Se₄Te (GSST) is performed, a common optical PCM tailored for infrared photonic applications, in an electrothermal switching configuration commensurate with their applications in on‐chip photonic devices. Further a set of design rules building on insights into the failure mechanisms is proposed, and successfully implemented them to boost the endurance of the Ge₂Sb₂Se₄Te (GSST) device to over 67 000 cycles. 

Owing to their unique tunable optical properties, chalcogenide phase change materials are increasingly being investigated for optics and photonics applications. However, in situ characterization of their phase transition characteristics is a capability that remains inaccessible to many researchers. Herein, a multifunctional silicon microheater platform capable of in situ measurement of structural, kinetic, optical, and thermal properties of these materials is introduced. The platform can be fabricated leveraging industry‐standard silicon foundry manufacturing processes. This platform is fully open‐sourced, including complete hardware design and associated software codes.