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Lead zirconate titanate (PZT) thin films offer advantages in microelectromechanical systems (MEMSs) including large motion, lower drive voltage, and high energy densities. Depending on the application, different substrates are sometimes required. Self-heating occurs in the PZT MEMS due to the energy loss from domain wall motion, which can degrade the device performance and reliability. In this work, the self-heating of PZT thin films on Si and glass and a film released from a substrate were investigated to understand the effect of substrates on the device temperature rise. Nano-particle assisted Raman thermometry was employed to quantify the operational temperature rise of these PZT actuators. The results were validated using a finite element thermal model, where the volumetric heat generation was experimentally determined from the hysteresis loss. While the volumetric heat generation of the PZT films on different substrates was similar, the PZT films on the Si substrate showed a minimal temperature rise due to the effective heat dissipation through the high thermal conductivity substrate. The temperature rise on the released structure is 6.8× higher than that on the glass substrates due to the absence of vertical heat dissipation. The experimental and modeling results show that the thin layer of residual Si remaining after etching plays a crucial role in mitigating the effect of device self-heating. The outcomes of this study suggest that high thermal conductivity passive elastic layers can be used as an effective thermal management solution for PZT-based MEMS actuators. 

The ultra-wide bandgap (UWBG) energy (∼5.4 eV) of α-phase Ga2O3 offers the potential to achieve higher power switching performance and efficiency than today's power electronic devices. However, a major challenge to the development of the α-Ga2O3 power electronics is overheating, which can degrade the device performance and cause reliability issues. In this study, thermal characterization of an α-Ga2O3 MOSFET was performed using micro-Raman thermometry to understand the device self-heating behavior. The α-Ga2O3 MOSFET exhibits a channel temperature rise that is more than two times higher than that of a GaN high electron mobility transistor (HEMT). This is mainly because of the low thermal conductivity of α-Ga2O3 (11.9 ± 1.0 W/mK at room temperature), which was determined via laser-based pump-probe experiments. A hypothetical device structure was constructed via simulation that transfer-bonds the α-Ga2O3 epitaxial structure over a high thermal conductivity substrate. Modeling results suggest that the device thermal resistance can be reduced to a level comparable to or even better than those of today's GaN HEMTs using this strategy combined with thinning of the α-Ga2O3 buffer layer. The outcomes of this work suggest that device-level thermal management is essential to the successful deployment of UWBG α-Ga2O3 devices. 

Gallium nitride (GaN) high electron mobility transistors (HEMTs) are key components of modern radio frequency (RF) power amplifiers. However, device self-heating negatively impacts both the performance and reliability of GaN HEMTs. Accordingly, laser-based pump-probe methods have been used to characterize the thermal resistance network of epitaxial material stacks that are used to fabricate HEMT structures. However, validation studies of these measurement results at the device level are lacking. In the present work, a GaN-on-SiC wafer was characterized using frequency-domain thermoreflectance and steady-state thermoreflectance techniques. The thermal conductivity of the GaN channel/buffer layer, SiC substrate, and the interfacial thermal boundary resistance at the GaN/SiC interface were determined. Results were validated by performing thermal imaging and modeling of a transmission line measurement (TLM) structure fabricated on the GaN-on-SiC wafer. 

Gallium nitride (GaN) high electron mobility transistors (HEMTs) are key components enabling today’s wireless communication systems. However, overheating concerns hinder today’s commercial GaN HEMTs from reaching their full potential. Therefore, it is necessary to characterize the respective thermally resistive components that comprise the device’s thermal resistance and determine their contributions to the channel temperature rise. In this work, the thermal conductivity of the GaN channel/buffer layer and the effective thermal boundary resistance (TBR) of the GaN/substrate interface of a GaN-on-SiC wafer were measured using a frequency-domain thermoreflectance technique. The results were validated by both experiments and modeling of a transmission line measurement (TLM) structure fabricated on the GaN-on-SiC wafer. The limiting GaN/substrate thermal boundary conductance (TBC) beyond which there is no influence on the device temperature rise was then quantified for different device configurations. It was determined that this limiting TBC is a function of the substrate material, the direction in which heat primarily flows, and the channel temperature. The outcomes of this work provide device engineers with guidance in the design of epitaxial GaN wafers that will help minimize the device’s thermal resistance. 

The demand for high power and high-frequency radio frequency (RF) power amplifiers makes AlGaN/GaN high electron mobility transistors (HEMTs) an attractive option due to their large critical field, high saturation velocity, and reduced device footprint as compared to Si-based counterparts. However, due to the high operating power densities, intense device self-heating occurs, which degrades the electrical performance and compromises the device’s reliability. The self-heating behavior of AlGaN/GaN HEMTs is known to be not solely a function of the dissipated power but is highly bias-dependent. As the operation of RF power amplifiers involves alteration of the device operation from fully-open to pinched-off channel conditions, it is critical to experimentally map the full channel temperature profile as a function of bias conditions. However, such measurement is difficult using optical thermography techniques due to the lack of optical access underneath the gate electrode, where the peak temperature is expected to occur. To address this challenge, an AlGaN/GaN HEMT employing a transparent gate made of indium tin oxide (ITO) was fabricated, which enables full channel temperature mapping using Raman spectroscopy. It was found that the maximum channel temperature rise under a partially pinched-off condition is more than ∼93% higher than that for an open channel condition, although both conditions would lead to an identical power dissipation level. The channel peak temperature probed in an ITO-gated device (underneath the gate) is ∼33% higher than the highest channel temperature that can be measured for a standard metal-gated AlGaN/GaN HEMT (i.e., next to the metal gate structure) operating under an identical bias condition. This indicates that one may significantly underestimate the device’s thermal resistance when solely relying on performing thermal characterization on the optically accessible region of a standard AlGaN/GaN HEMT. The outcomes of this study are important in terms of conducting a more accurate lifetime prediction of the device lifetime and designing thermal management solutions. 

Ultra-wide band gap semiconductor devices based on β-phase gallium oxide (Ga2O3) offer the potential to achieve higher switching performance and efficiency and lower manufacturing cost than that of today’s wide band gap power electronics. However, the most critical challenge to the commercialization of Ga2O3 electronics is overheating, which impacts the device performance and reliability. We fabricated a Ga2O3/4H–SiC composite wafer using a fusion-bonding method. A low-temperature (≤600 °C) epitaxy and device processing scheme was developed to fabricate MOSFETs on the composite wafer. The low-temperature-grown epitaxial Ga2O3 devices deliver high thermal performance (56% reduction in channel temperature) and a power figure of merit of (∼300 MW/cm2), which is the highest among heterogeneously integrated Ga2O3 devices reported to date. Simulations calibrated based on thermal characterization results of the Ga2O3-on-SiC MOSFET reveal that a Ga2O3/diamond composite wafer with a reduced Ga2O3 thickness (∼1 μm) and a thinner bonding interlayer (<10 nm) can reduce the device thermal impedance to a level lower than that of today’s GaN-on-SiC power switches.