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  1. Neuromorphic computers could overcome efficiency bottlenecks inherent to conventional computing through parallel programming and readout of artificial neural network weights in a crossbar memory array. However, selective and linear weight updates and <10-nanoampere read currents are required for learning that surpasses conventional computing efficiency. We introduce an ionic floating-gate memory array based on a polymer redox transistor connected to a conductive-bridge memory (CBM). Selective and linear programming of a redox transistor array is executed in parallel by overcoming the bridging threshold voltage of the CBMs. Synaptic weight readout with currents <10 nanoamperes is achieved by diluting the conductive polymer with an insulator to decrease the conductance. The redox transistors endure >1 billion write-read operations and support >1-megahertz write-read frequencies. 
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  2. Abstract

    The increasing interests in analog computing nowadays call for multipurpose analog computing platforms with reconfigurability. The advancement of analog computing, enabled by novel electronic elements like memristors, has shown its potential to sustain the exponential growth of computing demand in the new era of analog data deluge. Here, a platform of a memristive field‐programmable analog array (memFPAA) is experimentally demonstrated with memristive devices serving as a variety of core analog elements and CMOS components as peripheral circuits. The memFPAA is reconfigured to implement a first‐order band pass filter, an audio equalizer, and an acoustic mixed frequency classifier, as application examples. The memFPAA, featured with programmable analog memristors, memristive routing networks, and memristive vector‐matrix multipliers, opens opportunities for fast prototyping analog designs as well as efficient analog applications in signal processing and neuromorphic computing.

     
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  3. Abstract

    Memristors with tunable resistance states are emerging building blocks of artificial neural networks. However, in situ learning on a large-scale multiple-layer memristor network has yet to be demonstrated because of challenges in device property engineering and circuit integration. Here we monolithically integrate hafnium oxide-based memristors with a foundry-made transistor array into a multiple-layer neural network. We experimentally demonstrate in situ learning capability and achieve competitive classification accuracy on a standard machine learning dataset, which further confirms that the training algorithm allows the network to adapt to hardware imperfections. Our simulation using the experimental parameters suggests that a larger network would further increase the classification accuracy. The memristor neural network is a promising hardware platform for artificial intelligence with high speed-energy efficiency.

     
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  4. Abstract

    Different from nonvolatile memory applications, neuromorphic computing applications utilize not only the static conductance states but also the switching dynamics for computing, which calls for compact dynamical models of memristive devices. In this work, a generalized model to simulate diffusive and drift memristors with the same set of equations is presented, which have been used to reproduce experimental results faithfully. The diffusive memristor is chosen as the basis for the generalized model because it possesses complex dynamical properties that are difficult to model efficiently. A data set from statistical measurements on SiO2:Ag diffusive memristors is collected to verify the validity of the general model. As an application example, spike‐timing‐dependent plasticity is demonstrated with an artificial synapse consisting of a diffusive memristor and a drift memristor, both modeled with this comprehensive compact model.

     
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  6. Abstract

    A neuromorphic computing system may be able to learn and perform a task on its own by interacting with its surroundings. Combining such a chip with complementary metal–oxide–semiconductor (CMOS)‐based processors can potentially solve a variety of problems being faced by today's artificial intelligence (AI) systems. Although various architectures purely based on CMOS are designed to maximize the computing efficiency of AI‐based applications, the most fundamental operations including matrix multiplication and convolution heavily rely on the CMOS‐based multiply–accumulate units which are ultimately limited by the von Neumann bottleneck. Fortunately, many emerging memory devices can naturally perform vector matrix multiplication directly utilizing Ohm's law and Kirchhoff's law when an array of such devices is employed in a cross‐bar architecture. With certain dynamics, these devices can also be used either as synapses or neurons in a neuromorphic computing system. This paper discusses various emerging nanoscale electronic devices that can potentially reshape the computing paradigm in the near future.

     
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  7. Abstract

    Threshold switches with Ag or Cu active metal species are volatile memristors (also termed diffusive memristors) featuring spontaneous rupture of conduction channels. The temporal dynamics of the conductance evolution is closely related to the electrochemical and diffusive dynamics of the active metals which could be modulated by electric field strength, biasing duration, temperature, and so on. Microscopic pictures by electron microscopy and quantitative thermodynamics modeling are examined to give insights into the underlying physics of the switching. Depending on the time scale of the relaxation process, such devices find a variety of novel applications in electronics, ranging from selector devices for memories to synaptic devices for neuromorphic computing.

     
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