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We present IOTap, a tool that analyzes and profiles block I/O traces. IOTap computes the (dis)similarities among a set of workloads and sets a guideline for selecting a subset of traces for benchmarking. By doing so, we avoid experimentally running all workloads or, even worse, arbitrarily selecting a subset that skews the results.We demonstrate the usefulness of IOTap by comparing its results with experiments on real SSDs, achieving a high correlation of 0.92 for an NVMe SSD.

Command and control (C2) data links over cellular networks is envisioned to be a reliable communications modality for various types of missions for Unmanned Aircraft System (UAS). The planning of UAS traffic and the provision of cellular communication resources are cross-coupled decisions that should be analyzed together to understand the quality of service such a modality can provide that meets business needs. The key to effective planning is the accurate estimation of communication link quality and the resource usage for a given air traffic requirement. In this work, a simulation and modelling framework is developed that integrates two open-source simulation platforms, Repast Simphony and ns-3, to generate UAS missions over different geographical areas and simulates the provision of 4G/5G cellular network connectivity to support their C2 and mission data links. To the best of our knowledge, this is the first simulator that co-simulates air traffic and cellular network communications for UAS while leveraging standardized 3GPP propagation models and incorporating detailed management of communication channels (i.e., resource blocks) at the cellular base station level. Three experiments were executed to demonstrate how the integrated simulation platform can be used to provide guidelines in communication resource allocation, air traffic management, and mission safetymore »management in beyond visual line of sight (BVLOS) operations.« less

The explosion of “big data” applications imposes severe challenges of speed and scalability on traditional computer systems. As the performance of traditional Von Neumann machines is greatly hindered by the increasing performance gap between CPU and memory (“known as the memory wall”), neuromorphic computing systems have gained considerable attention. The biology-plausible computing paradigm carries out computing by emulating the charging/discharging process of neuron and synapse potential. The unique spike domain information encoding enables asynchronous event driven computation and communication, and hence has the potential for very high energy efficiency. This survey reviews computing models and hardware platforms of existing neuromorphic computing systems. Neuron and synapse models are first introduced, followed by the discussion on how they will affect hardware design. Case studies of several representative hardware platforms, including their architecture and software ecosystems, are further presented. Lastly we present several future research directions.

The recently discovered spatial-temporal information processing capability of bio-inspired Spiking neural networks (SNN) has enabled some interesting models and applications. However designing large-scale and high-performance model is yet a challenge due to the lack of robust training algorithms. A bio-plausible SNN model with spatial-temporal property is a complex dynamic system. Synapses and neurons behave as filters capable of preserving temporal information. As such neuron dynamics and filter effects are ignored in existing training algorithms, the SNN downgrades into a memoryless system and loses the ability of temporal signal processing. Furthermore, spike timing plays an important role in information representation, but conventional rate-based spike coding models only consider spike trains statistically, and discard information carried by its temporal structures. To address the above issues, and exploit the temporal dynamics of SNNs, we formulate SNN as a network of infinite impulse response (IIR) filters with neuron nonlinearity. We proposed a training algorithm that is capable to learn spatial-temporal patterns by searching for the optimal synapse filter kernels and weights. The proposed model and training algorithm are applied to construct associative memories and classifiers for synthetic and public datasets including MNIST, NMNIST, DVS 128 etc. Their accuracy outperforms state-of-the-art approaches.

Driven by the expanse of Internet of Things (IoT) and Cyber-Physical Systems (CPS), there is an increasing demand to process streams of temporal data on embedded devices with limited energy and power resources. Among all potential solutions, neuromorphic computing with spiking neural networks (SNN) that mimic the behavior of brain, have recently been placed at the forefront. Encoding information into sparse and distributed spike events enables low-power implementations, and the complex spatial temporal dynamics of synapses and neurons enable SNNs to detect temporal pattern. However, most existing hardware SNN implementations use simplified neuron and synapse models ignoring synapse dynamic, which is critical for temporal pattern detection and other applications that require temporal dynamics. To adopt a more realistic synapse model in neuromorphic platform its significant computation overhead must be addressed. In this work, we propose an FPGA-based SNN with biologically realistic neuron and synapse for temporal information processing. An encoding scheme to convert continuous real-valued information into sparse spike events is presented. The event-driven implementation of synapse dynamic model and its hardware design that is optimized to exploit the sparsity are also presented. Finally, we train the SNN on various temporal pattern-learning tasks and evaluate its performance and efficiency asmore »compared to rate-based models and artificial neural networks on different embedded platforms. Experiments show that our work can achieve 10X speed up and 196X gains in energy efficiency compared with GPU.« less