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Abstract In the ‘Beyond Moore’s Law’ era, with increasing edge intelligence, domain-specific computing embracing unconventional approaches will become increasingly prevalent. At the same time, adopting a variety of nanotechnologies will offer benefits in energy cost, computational speed, reduced footprint, cyber resilience, and processing power. The time is ripe for a roadmap for unconventional computing with nanotechnologies to guide future research, and this collection aims to fill that need. The authors provide a comprehensive roadmap for neuromorphic computing using electron spins, memristive devices, two-dimensional nanomaterials, nanomagnets, and various dynamical systems. They also address other paradigms such as Ising machines, Bayesian inference engines, probabilistic computing with p-bits, processing in memory, quantum memories and algorithms, computing with skyrmions and spin waves, and brain-inspired computing for incremental learning and problem-solving in severely resource-constrained environments. These approaches have advantages over traditional Boolean computing based on von Neumann architecture. As the computational requirements for artificial intelligence grow 50 times faster than Moore’s Law for electronics, more unconventional approaches to computing and signal processing will appear on the horizon, and this roadmap will help identify future needs and challenges. In a very fertile field, experts in the field aim to present some of the dominant and most promising technologies for unconventional computing that will be around for some time to come. Within a holistic approach, the goal is to provide pathways for solidifying the field and guiding future impactful discoveries. 

Memristive devices based on two-dimensional (2D) materials have emerged as potential synaptic candidates for next-generation neuromorphic computing hardware. Here, we introduce a numerical modeling framework that facilitates efficient exploration of the large parameter space for 2D memristive synaptic devices. High-throughput charge-transport simulations are performed to investigate the voltage pulse characteristics for lateral 2D memristors and synaptic device metrics are studied for different weight-update schemes. We show that the same switching mechanism can lead to fundamentally different pulse characteristics influencing not only the device metrics but also the weight-update direction. A thorough analysis of the parameter space allows simultaneous optimization of the linearity, symmetry, and drift in the synaptic behavior that are related through tradeoffs. The presented modeling framework can serve as a tool for designing 2D memristive devices in practical neuromorphic circuits by providing guidelines for materials properties, device functionality, and system performance for target applications. 

We discuss how a dual-gated memtransistor crossbar can accelerate the extraction of the Transformer’s attention scores. A memtransistor is a novel two-dimensional material-based device that offers non-volatile programmability and gate tunability. Leveraging these attributes, we demonstrate the extraction of quadratic-order products on a single memtransistor and the single-step extraction of attention scores without inferring intermediate query/key vectors. The query/key-free processing of memtransistor-based attention scoring results in 2.37× lower energy with less than half crossbar cells. 

Neuromorphic hardware promises to revolutionize information technology with brain-inspired parallel processing, in-memory computing, and energy-efficient implementation of artificial intelligence and machine learning. In particular, two-dimensional (2D) memtransistors enable gate-tunable non-volatile memory, bio-realistic synaptic phenomena, and atomically thin scaling. However, previously reported 2D memtransistors have not achieved low operating voltages without compromising gate-tunability. Here, we overcome this limitation by demonstrating MoS2 memtransistors with short channel lengths < 400 nm, low operating voltages < 1 V, and high field-effect switching ratios > 10,000 while concurrently achieving strong memristive responses. This functionality is realized by fabricating back-gated memtransistors using highly polycrystalline monolayer MoS2 channels on high-κ Al2O3 dielectric layers. Finite-element simulations confirm enhanced electrostatic modulation near the channel contacts, which reduces operating voltages without compromising memristive or field-effect switching. Overall, this work demonstrates a pathway for reducing the size and power consumption of 2D memtransistors as is required for ultrahigh-density integration. 

Advances in algorithms and low-power computing hardware imply that machine learning is of potential use in off-grid medical data classification and diagnosis applications such as electrocardiogram interpretation. However, although support vector machine algorithms for electrocardiogram classification show high classification accuracy, hardware implementations for edge applications are impractical due to the complexity and substantial power consumption needed for kernel optimization when using conventional complementary metal–oxide–semiconductor circuits. Here we report reconfigurable mixed-kernel transistors based on dual-gated van der Waals heterojunctions that can generate fully tunable individual and mixed Gaussian and sigmoid functions for analogue support vector machine kernel applications. We show that the heterojunction-generated kernels can be used for arrhythmia detection from electrocardiogram signals with high classification accuracy compared with standard radial basis function kernels. The reconfigurable nature of mixed-kernel heterojunction transistors also allows for personalized detection using Bayesian optimization. A single mixed-kernel heterojunction device can generate the equivalent transfer function of a complementary metal–oxide–semiconductor circuit comprising dozens of transistors and thus provides a low-power approach for support vector machine classification applications. 

The increasing complexity of deep learning systems has pushed conventional computing technologies to their limits. While the memristor is one of the prevailing technologies for deep learning acceleration, it is only suited for classical learning layers where only two operands, namely weights and inputs, are processed simultaneously. Meanwhile, to improve the computational efficiency of deep learning for emerging applications, a variety of non-traditional layers requiring concurrent processing of many operands are becoming popular. For example, hypernetworks improve their predictive robustness by simultaneously processing weights and inputs against the application context. Two-electrode memristor grids cannot directly map emerging layers’ higher-order multiplicative neural interactions. Addressing this unmet need, we present crossbar processing using dual-gated memtransistors based on two-dimensional semiconductor MoS 2 . Unlike the memristor, the resistance states of memtransistors can be persistently programmed and can be actively controlled by multiple gate electrodes. Thus, the discussed memtransistor crossbar enables several advanced inference architectures beyond a conventional passive crossbar. For example, we show that sneak paths can be effectively suppressed in memtransistor crossbars, whereas they limit size scalability in a passive memristor crossbar. Similarly, exploiting gate terminals to suppress crossbar weights dynamically reduces biasing power by ∼20% in memtransistor crossbars for a fully connected layer of AlexNet. On emerging layers such as hypernetworks, collocating multiple operations within the same crossbar cells reduces operating power by ∼ 15 × on the considered network cases.