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Neuromorphic hardware promises to revolutionize information technology with brain-inspired parallel processing, in-memory computing, and energy-efficient implementation of artificial intelligence and machine learning. In particular, two-dimensional (2D) memtransistors enable gate-tunable non-volatile memory, bio-realistic synaptic phenomena, and atomically thin scaling. However, previously reported 2D memtransistors have not achieved low operating voltages without compromising gate-tunability. Here, we overcome this limitation by demonstrating MoS2 memtransistors with short channel lengths < 400 nm, low operating voltages < 1 V, and high field-effect switching ratios > 10,000 while concurrently achieving strong memristive responses. This functionality is realized by fabricating back-gated memtransistors using highly polycrystalline monolayer MoS2 channels on high-κ Al2O3 dielectric layers. Finite-element simulations confirm enhanced electrostatic modulation near the channel contacts, which reduces operating voltages without compromising memristive or field-effect switching. Overall, this work demonstrates a pathway for reducing the size and power consumption of 2D memtransistors as is required for ultrahigh-density integration.
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Higher order neural processing with input-adaptive dynamic weights on MoS2 memtransistor crossbars
The increasing complexity of deep learning systems has pushed conventional computing technologies to their limits. While the memristor is one of the prevailing technologies for deep learning acceleration, it is only suited for classical learning layers where only two operands, namely weights and inputs, are processed simultaneously. Meanwhile, to improve the computational efficiency of deep learning for emerging applications, a variety of non-traditional layers requiring concurrent processing of many operands are becoming popular. For example, hypernetworks improve their predictive robustness by simultaneously processing weights and inputs against the application context. Two-electrode memristor grids cannot directly map emerging layers’ higher-order multiplicative neural interactions. Addressing this unmet need, we present crossbar processing using dual-gated memtransistors based on two-dimensional semiconductor MoS 2 . Unlike the memristor, the resistance states of memtransistors can be persistently programmed and can be actively controlled by multiple gate electrodes. Thus, the discussed memtransistor crossbar enables several advanced inference architectures beyond a conventional passive crossbar. For example, we show that sneak paths can be effectively suppressed in memtransistor crossbars, whereas they limit size scalability in a passive memristor crossbar. Similarly, exploiting gate terminals to suppress crossbar weights dynamically reduces biasing power by ∼20% in memtransistor crossbars for a fully connected layer of AlexNet. On emerging layers such as hypernetworks, collocating multiple operations within the same crossbar cells reduces operating power by ∼ 15 × on the considered network cases.
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- PAR ID:
- 10350571
- Date Published:
- Journal Name:
- Frontiers in Electronic Materials
- Volume:
- 2
- ISSN:
- 2673-9895
- Format(s):
- Medium: X
- Sponsoring Org:
- National Science Foundation
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- Free Publicly Accessible Full Text
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Accepted Manuscript1.0
- Journal Article:
- https://doi.org/10.3389/femat.2022.950487
