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Title: An Equivalence Verification Methodology for Asynchronous Sleep Convention Logic Circuits
Award ID(s):
1717420
PAR ID:
10108104
Author(s) / Creator(s):
; ; ;
Date Published:
Journal Name:
2019 IEEE International Symposium on Circuits and Systems (ISCAS)
Page Range / eLocation ID:
1 to 5
Format(s):
Medium: X
Sponsoring Org:
National Science Foundation
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