Functional hardware description languages (FHDL) provide powerful tools for building new abstractions that enable sophisticated hardware system to be constructed by composing small reusable parts. Raising the level of abstractions in hardware designs means the programmer can focus on high-level circuit structure rather than mundane low-level details. The language features that facilitate this include high-order functions, rich static type system with type inference, and parametric polymorphism. We use hand-written structural and behavioral VHDL, Simulink, and the Kansas Lava FHDL to re-implement several components taken from a Simulink model of an orthogonal frequency-division multiplexing (OFDM) physical layer (PHY). Our development demonstrates that an FHDL can require fewer lines of code than traditional design languages without sacrificing performance.
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Kinds Are Calling Conventions
A language supporting polymorphism is a boon to programmers: they can express complex ideas once and reuse functions in a variety of situations. However, polymorphism is a pain for compilers tasked with producing efficient code that manipulates concrete values.
This paper presents a new intermediate language that allows for efficient static compilation, while still supporting flexible polymorphism. Specifically, it permits
polymorphism over not only the types of values, but also the representation of
values, the arity of primitive machine functions, and the evaluation order of
arguments---all three of which are useful in practice. The key insight is to
encode information about a value's calling convention in the kind of
its type, rather than in the type itself.
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- Award ID(s):
- 1719158
- NSF-PAR ID:
- 10173448
- Date Published:
- Journal Name:
- International Conference of Functional Programming
- Format(s):
- Medium: X
- Sponsoring Org:
- National Science Foundation
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- Free Publicly Accessible Full Text
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Accepted Manuscript1.0
- Conference Paper:
- https://doi.org/10.1145/3408986
