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Title: Synthesizing Efficient Hardware from High-Level Functional Hardware Description Languages
Functional hardware description languages (FHDL) provide powerful tools for building new abstractions that enable sophisticated hardware system to be constructed by composing small reusable parts. Raising the level of abstractions in hardware designs means the programmer can focus on high-level circuit structure rather than mundane low-level details. The language features that facilitate this include high-order functions, rich static type system with type inference, and parametric polymorphism. We use hand-written structural and behavioral VHDL, Simulink, and the Kansas Lava FHDL to re-implement several components taken from a Simulink model of an orthogonal frequency-division multiplexing (OFDM) physical layer (PHY). Our development demonstrates that an FHDL can require fewer lines of code than traditional design languages without sacrificing performance.  more » « less
Award ID(s):
1717088
NSF-PAR ID:
10195987
Author(s) / Creator(s):
;
Date Published:
Journal Name:
26th IEEE International Conference on Electronics, Circuits and Systems
Page Range / eLocation ID:
634 to 637
Format(s):
Medium: X
Sponsoring Org:
National Science Foundation
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