Fast electrochemical imaging enables the dynamic study of electroactive molecule diffusion in neurotransmitter release from single cells and dopamine mapping in brain slices. In this paper, we discuss the design of an electrochemical imaging sensor using a monolithic CMOS sensor array and a multifunctional data acquisition system. Using post-CMOS fabrication, the CMOS sensor integrates 1024 on-chip electrodes on the surface and contains 1024 low-noise amplifiers to simultaneous process parallel electrochemical recordings. Each electrochemical electrode and amplifier are optimized to operate at 10.38 kHz sampling rate. To support the operation of the high-throughput CMOS device, a multifunctional data acquisition device is developed to provide the required speed and accuracy. The high analog data rate of 10.63 MHz from all 1024 amplifiers is redundantly sampled by the custom-designed data acquisition system which can process up to 73.6 MHz with up to ~400 Mbytes/s data rate to a computer using USB 3.0 interface. To contain the liquid above the electrochemical sensors and prevent electronic and wire damage, we packaged the monolithic sensor using a 3D-printed well. Using the presented device, 32 pixel × 32 pixel electrochemical imaging of dopamine diffusion is successfully demonstrated at over 10,000 frames per second, the fastest reported to date.
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1024-Electrode Hybrid Voltage/Current-Clamp Neural Interface System-on-Chip with Dynamic Incremental-SAR Acquisition
We present a neural interface system-on-chip (NISoC) with 1,024 channels of simultaneous electrical recording and stimulation for high-resolution high-throughput electrophysiology. The 2mm 2mm NISoC in 65nm CMOS integrates a 32 32 array of electrodes vertically coupled to analog front-ends supporting both voltage and current clamping through a programmable interface, ranging over 100dB in voltage and 120dB in current, with 0.82mW power per channel at 5.96mVrms input-referred voltage noise from DC to 12.5kHz signal bandwidth. This includes onchip acquisition with a back-end array of 32 dynamic incremental SAR ADCs for 25Msps 11-ENOB acquisition at 2fJ/level FOM.
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- Award ID(s):
- 1728497
- PAR ID:
- 10192278
- Date Published:
- Journal Name:
- 2020 IEEE Symposium on VLSI Circuits (VLSI-Circuits)
- Page Range / eLocation ID:
- 1 to 2
- Format(s):
- Medium: X
- Sponsoring Org:
- National Science Foundation
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