Xu, Pengfei, Zhao, Yang, hao, Cong, Zhang, Xiaofan, Guan, Zetong, Zhang, Yongan, Wang, Yue, Chen, Deming, and Lin, Yingyan. AutoDNNchip: An Automated DNN Chip Predictor and Builder for Both FPGAs and ASICs. Retrieved from https://par.nsf.gov/biblio/10195420. 28th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA 2020) . Web. doi:10.1145/3373087.3375306.

Xu, Pengfei, Zhao, Yang, hao, Cong, Zhang, Xiaofan, Guan, Zetong, Zhang, Yongan, Wang, Yue, Chen, Deming, & Lin, Yingyan. AutoDNNchip: An Automated DNN Chip Predictor and Builder for Both FPGAs and ASICs. 28th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA 2020), (). Retrieved from https://par.nsf.gov/biblio/10195420. https://doi.org/10.1145/3373087.3375306

Xu, Pengfei, Zhao, Yang, hao, Cong, Zhang, Xiaofan, Guan, Zetong, Zhang, Yongan, Wang, Yue, Chen, Deming, and Lin, Yingyan. "AutoDNNchip: An Automated DNN Chip Predictor and Builder for Both FPGAs and ASICs". 28th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA 2020) (). Country unknown/Code not available. https://doi.org/10.1145/3373087.3375306. https://par.nsf.gov/biblio/10195420.

@article{osti_10195420,
place = {Country unknown/Code not available}, title = {AutoDNNchip: An Automated DNN Chip Predictor and Builder for Both FPGAs and ASICs}, url = {https://par.nsf.gov/biblio/10195420}, DOI = {10.1145/3373087.3375306}, abstractNote = {}, journal = {28th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA 2020)}, author = {Xu, Pengfei and Zhao, Yang and hao, Cong and Zhang, Xiaofan and Guan, Zetong and Zhang, Yongan and Wang, Yue and Chen, Deming and Lin, Yingyan}, }