Phase‐change memory is an emerging technology that utilizes the electrical resistivity contrast between the amorphous and crystalline phases of chalcogenide glasses to store data. The most commonly used material for PCM has been GeSbTe (GST), which has metastable amorphous and crystalline fcc phases and a stable crystalline hcp phase [1]. One difficulty with the implementation of PCM is the upward resistance drift of the metastable amorphous and crystalline fcc phases. We are using electrical characterization together with transmission electron microscopy and finite‐element electrothermal simulations [2] to study the physical mechanisms that give rise to the electrical resistance drift of GST cells.
Stopping Resistance Drift in Phase Change Memory Cells
Phase change memory (PCM) is a high speed, high endurance, high density non-volatile memory technology that utilizes chalcogenide materials such as Ge 2 Sb 2 Te 5 (GST) that can be electrically cycled between highly resistive amorphous and low resistance crystalline phases. The resistance of the amorphous phase of PCM cells increase (drift) in time following a power law [1] , which increases the memory window in time but limits in the implementation of multi-bit-per-cell PCM. There has been a number of theories explaining the origin of drift [1] - [4] , mostly attributing it to structural relaxation, a thermally activated rearrangement of atoms in the amorphous structure [2] . Most of the studies on resistance drift are based on experiments at or above room temperature, where multiple processes may be occurring simultaneously. In this work, we melt-quenched amorphized GST line cells with widths ~120-140 nm, lengths ~390-500 nm, and thickness ~50nm ( Fig. 1 ) and monitored the current-voltage (I-V) characteristics using a parameter analyzer ( Fig. 2 ) in 85 K to 350 K range. We extracted the drift co-efficient from the slope of the resistance vs. time plots (using low-voltage measurements) and observed resistance drift in the more »
- Award ID(s):
- 1711626
- Publication Date:
- NSF-PAR ID:
- 10198070
- Journal Name:
- Device Research Conference
- Page Range or eLocation-ID:
- 1 to 2
- Sponsoring Org:
- National Science Foundation
More Like this
-
-
Resonant tunneling diodes (RTDs) have come full-circle in the past 10 years after their demonstration in the early 1990s as the fastest room-temperature semiconductor oscillator, displaying experimental results up to 712 GHz and fmax values exceeding 1.0 THz [1]. Now the RTD is once again the preeminent electronic oscillator above 1.0 THz and is being implemented as a coherent source [2] and a self-oscillating mixer [3], amongst other applications. This paper concerns RTD electroluminescence – an effect that has been studied very little in the past 30+ years of RTD development, and not at room temperature. We present experiments and modeling of an n-type In0.53Ga0.47As/AlAs double-barrier RTD operating as a cross-gap light emitter at ~300K. The MBE-growth stack is shown in Fig. 1(a). A 15-μm-diam-mesa device was defined by standard planar processing including a top annular ohmic contact with a 5-μm-diam pinhole in the center to couple out enough of the internal emission for accurate free-space power measurements [4]. The emission spectra have the behavior displayed in Fig. 1(b), parameterized by bias voltage (VB). The long wavelength emission edge is at = 1684 nm - close to the In0.53Ga0.47As bandgap energy of Ug ≈ 0.75 eV at 300 K.more »
-
To understand the mechanism underlying the fast, reversible, phase transformation, information about the atomic structure and defects structures in phase change materials class is key. PCMs are investigated for many applications. These devices are chalcogenide based and use self heating to quickly switch between amorphous and crystalline phases, generating orders of magnitude differences in the electrical resistivity. The main challenges with PCMs have been the large power required to heat above crystallization or melting (for melt-quench amorphization) temperatures and limited reliability due to factors such as resistance drifts of the metastable phases, void formation and elemental segregation upon cycling. Characterization of devices and their unique switching behavior result in distinct material properties affected by the atomic arrangement in the respective phase. TEM is used to study the atomic structure of the metastable crystalline phase. The aim is to correlate the microstructure with results from electrical characterization, building on R vs T measurements on various thicknesses GST thin films. To monitor phase changes in real-time as a function of temperature, thin films are deposited directly onto Protochips carriers. The Protochips heating holders provides controlled temperature changes while imaging in the TEM. These studies can provide insights into how changes occur inmore »
-
Over the two decades, amorphous oxide semiconductors (AOSs) and their thin film transistor (TFT) channel application have been intensely explored to realize high performance, transparent and flexible displays due to their high field effect mobility (μFE=5-20 cm2/Vs), visible range optical transparency, and low temperature processability (25-300 °C).[1-2] The metastable amorphous phase is to be maintained during operation by the addition of Zn and additional third cation species (e.g., Ga, Hf, or Al) as an amorphous phase stabilizer.[3-5] To limit TFT off-state currents, a thin channel layer (10-20 nm) was employed for InZnO (IZO)-based TFTs, or third cations were added to suppress carrier generations in the TFT channel. To resolve bias stress-induced instabilities in TFT performance, approaches to employ defect passivation layers or enhance channel/dielectric interfacial compatibility were demonstrated.[6-7] Metallization contact is also a dominating factor that determines the performance of TFTs. Particularly, it has been reported that high electrical contact resistance significantly sacrifices drain bias applied to the channel, which leads to undesirable power loss during TFT operation and issues for the measurement of TFT field effect mobilities. [2, 8] However, only a few reports that suggest strategies to enhance contact behaviors are available in the literature. Furthermore, the previousmore »
-
The traditional von Neumann architecture limits the increase in computing efficiency and results in massive power consumption in modern computers due to the separation of storage and processing units. The novel neuromorphic computation system, an in-memory computing architecture with low power consumption, is aimed to break the bottleneck and meet the needs of the next generation of artificial intelligence (AI) systems. Thus, it is urgent to find a memory technology to implement the neuromorphic computing nanosystem. Nowadays, the silicon-based flash memory dominates non-volatile memory market, however, it is facing challenging issues to achieve the requirements of future data storage device development due to the drawbacks, such as scaling issue, relatively slow operation speed, and high voltage for program/erase operations. The emerging resistive random-access memory (RRAM) has prompted extensive research as its simple two-terminal structure, including top electrode (TE) layer, bottom electrode (BE) layer, and an intermediate resistive switching (RS) layer. It can utilize a temporary and reversible dielectric breakdown to cause the RS phenomenon between the high resistance state (HRS) and the low resistance state (LRS). RRAM is expected to outperform conventional memory device with the advantages, notably its low-voltage operation, short programming time, great cyclic stability, and good scalability.more »