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Title: CHEx86: Context-Sensitive Enforcement of Memory Safety via Microcode-Enabled Capabilities
This work introduces the CHEx86 processor architecture for securing applications, including legacy binaries, against a wide array of security exploits that target temporal and spatial memory safety vulnerabilities such as out-of-bounds accesses, use-after-free, double-free, and uninitialized reads, by instrumenting the code at the microcode-level, completely under-the-hood, with only limited access to source-level symbol information. In addition, this work presents a novel scheme for speculatively tracking pointer arithmetic and pointer movement, including the detection of pointer aliases in memory, at the machine code-level using a configurable set of automatically constructed rules. This architecture outperforms the address sanitizer, a state-of-the-art software-based mitigation by 59%, while eliminating porting, deployment, and verification costs that are invariably associated with recompilation.  more » « less
Award ID(s):
1912608
NSF-PAR ID:
10201445
Author(s) / Creator(s):
;
Date Published:
Journal Name:
2020 ACM/IEEE 47th Annual International Symposium on Computer Architecture (ISCA)
Page Range / eLocation ID:
762 to 775
Format(s):
Medium: X
Sponsoring Org:
National Science Foundation
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