skip to main content


Title: Guidelines for Ferroelectric FET Reliability Optimization: Charge Matching
An optimization principle for ferroelectric FET (FeFET), centered around charge matching between the ferroelectric and its underlying semiconductor, is theoretically investigated. This letter shows that, by properly reducing the ferroelectric polarization charge and its background dielectric constant, charge matching can be improved to enable simultaneously: i) reduction of the interlayer and semiconductor electric fields during programming, reading, and retention, leading to prolonged endurance and retention; ii) improvement of the memory window; and iii) suppression of device-to-device variations by affording full polarization switching. These attributes provide an incentive for the presentation of the proposed guidelines for FeFET optimization as detailed in this letter.  more » « less
Award ID(s):
1941316
NSF-PAR ID:
10207154
Author(s) / Creator(s):
; ; ; ;
Editor(s):
Ha, D.
Date Published:
Journal Name:
IEEE electron device letters
Volume:
41
Issue:
9
ISSN:
1558-0563
Page Range / eLocation ID:
1348-1320
Format(s):
Medium: X
Sponsoring Org:
National Science Foundation
More Like this
  1. null (Ed.)
    Doped HfO2 based ferroelectric FET (FeFET) exhibits a greatly improved retention performance compared with its perovskite counterpart due to its large coercive field, which prevents domain flip during retention. In this work, however, through extensive temperature dependent experimental characterization and modeling, we are demonstrating that: 1) with FeFET geometry scaling, the polarization states are no longer stable, but exhibit multi-step degradation and cause reduced sense margin in distinguishable adjacent levels or even eventual memory window collapse; 2) the instability is caused by the temperature activated accumulation of switching probability under depolarization field stress, which could cause domain switching within the retention time at operating temperatures. 
    more » « less
  2. Abstract

    Ferroelectrics offer a promising material platform to realize energy-efficient non-volatile memory technology with the FeFET-based implementations being one of the most area-efficient ferroelectric memory architectures. However, the FeFET operation entails a fundamental trade-off between the read and the program operations. To overcome this trade-off, we propose in this work, a novel device concept, Mott-FeFET, that aims to replace the Silicon channel of the FeFET with VO2- a material that exhibits an electrically driven insulator–metal phase transition. The Mott-FeFET design, which demonstrates a (ferroelectric) polarization-dependent threshold voltage, enables the read current distinguishability (i.e., the ratio of current sensed when the Mott-FeFET is in state 1 and 0, respectively) to be independent of the program voltage. This enables the device to be programmed at low voltages without affecting the ability to sense/read the state of the device. Our work provides a pathway to realize low-voltage and energy-efficient non-volatile memory solutions.

     
    more » « less
  3. Ferroelectric field‐effect transistors (FeFETs) employing graphene on inorganic perovskite substrates receive considerable attention due to their interesting electronic and memory properties. They are known to exhibit an unusual hysteresis of electronic transport that is not consistent with the ferroelectric polarization hysteresis and is previously shown to be associated with charge trapping at graphene–ferroelectric interface. Here, an electrical measurement scheme that minimizes the effect of charge traps and reveals the polarization‐dependent hysteresis of electronic transport in graphene–Pb(Zr,Ti)O3FeFETs is demonstrated. Observation of the polarization‐dependent conductivity hysteresis is important for the fundamental understanding of the interplay between the ferroelectric polarization and charge carriers in graphene. It is also important for practical memory applications because this hysteresis emulates the operation of nonvolatile memories and reveals the range of ON and OFF currents that can be achieved in long term data storage. It is demonstrated that this measurement scheme can be used to optimize the memory performance of graphene–PZT FeFETs that can exhibit nonvolatile time‐independent ON/OFF ratios of over 5. The described measurement technique can potentially be used in the studies of kinetics of charge trap dissipation, polarization‐dependent properties, and memory performance of FeFET devices comprising other 2D materials and various ferroelectric substrates.

     
    more » « less
  4. This study investigates the electrical characteristics observed in n-channel and p-channel ferroelectric field effect transistor (FeFET) devices fabricated through a similar process flow with 10 nm of ferroelectric hafnium zirconium oxide (HZO) as the gate dielectric. The n-FeFETs demonstrate a faster complete polarization switching compared to the p-channel counterparts. Detailed and systematic investigations using TCAD simulations reveal the role of fixed charges and interface traps at the HZO-interfacial layer (HZO/IL) interface in modulating the subthreshold characteristics of the devices. A characteristic crossover point observed in the transfer characteristics of n-channel devices is attributed with the temporary switching between ferroelectric-based operation to charge-based operation, caused by the pinning effect due to the presence of different traps. This experimental study helps understand the role of charge trapping effects in switching characteristics of n- and p-channel ferroelectric FETs.

     
    more » « less
  5. null (Ed.)
    Indium Selenide (In 2 Se 3 ) is a newly emerged van der Waals (vdW) ferroelectric material, which unlike traditional insulating ferroelectric materials, is a semiconductor with a bandgap of about 1.36 eV. Ferroelectric diodes and transistors based on In 2 Se 3 have been demonstrated. However, the interplay between light and electric polarization in In 2 Se 3 has not been explored. In this paper, we found that the polarization in In 2 Se 3 can be programmed by optical stimuli, due to its semiconducting nature, where the photo generated carriers in In 2 Se 3 can alter the screening field and lead to polarization reversal. Utilizing these unique properties of In 2 Se 3 , we demonstrated a new type of multifunctional device based on 2D heterostructures, which can concurrently serve as a logic gate, photodetector, electronic memory and photonic memory. This dual electrical and optical operation of the memories can simplify the device architecture and offer additional functionalities, such as ultrafast optical erase of large memory arrays. In addition, we show that dual-gate structure can address the partial switching problem commonly observed in In 2 Se 3 ferroelectric transistors, as the two gates can enhance the vertical electric field and facilitate the polarization switching in the semiconducting In 2 Se 3 . These discovered effects are of general nature and should be observable in any ferroelectric semiconductor. These findings deepen the understanding of polarization switching and light-polarization interaction in semiconducting ferroelectric materials and open up their applications in multifunctional electronic and photonic devices. 
    more » « less