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1. Guidelines for Ferroelectric FET Reliability Optimization: Charge Matching

   https://doi.org/10.1109/LED.2020.3011037  

   Deng, Shan; liu, Zhan; Li, Xueqing; Ma, T.P; and Ni, Kai. (July 2020, IEEE electron device letters)

   Ha, D. (Ed.)

   An optimization principle for ferroelectric FET (FeFET), centered around charge matching between the ferroelectric and its underlying semiconductor, is theoretically investigated. This letter shows that, by properly reducing the ferroelectric polarization charge and its background dielectric constant, charge matching can be improved to enable simultaneously: i) reduction of the interlayer and semiconductor electric fields during programming, reading, and retention, leading to prolonged endurance and retention; ii) improvement of the memory window; and iii) suppression of device-to-device variations by affording full polarization switching. These attributes provide an incentive for the presentation of the proposed guidelines for FeFET optimization as detailed in this letter. 

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2. Highly Efficient Polarization‐Controlled Electrical Conductance Modulation in a van der Waals Ferroelectric/Semiconductor Heterostructure

   https://doi.org/10.1002/aelm.202200413  

   Parker, Jacob; Gu, Yi (September 2022, Advanced Electronic Materials)

   Abstract Utilizing the unique in‐plane/out‐of‐plane polarization coupling in ferroelectric van der Waals α‐In₂Se₃, ferroelectric‐polarization‐controlled electrical conductance modulation in two‐dimensional (2D) MoS₂with a large dynamic range of over 5 orders of magnitude and excellent non‐volatility is demonstrated. This highly efficient control of the electrical conductance is facilitated by enhanced capacitive coupling through atomic‐layer‐deposition‐grown Al₂O₃as the dielectric medium. By varying the in‐plane poling bias to the ferroelectric α‐In₂Se₃, the electrical conductance of vertically stacked 2D MoS₂can be tuned continuously. This approach enables simplified device design and provides great flexibility in device integrations, and it can be applied in principle to manipulate the electronic states in any 2D semiconductors for various applications such as transistors, tunneling devices, and reconfigurable electronics. The results also provide insight into the ferroelectric polarization screening by ambient chemical species, highlighting the need for surface passivation, and/or device encapsulations. 

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3. In ₂ Se ₃ Synthesized by the FWF Method for Neuromorphic Computing

   https://doi.org/10.1002/aelm.202400603  

   Shin, Jaeho; Jang, Jingon; Choi, Chi_Hun; Kim, Jaegyu; Eddy, Lucas; Scotland, Phelecia; Martin, Lane_W; Han, Yimo; Tour, James_M (November 2024, Advanced Electronic Materials)

   Abstract The development of next‐generation in‐memory and neuromorphic computing can be realized with memory transistors based on 2D ferroelectric semiconductors. Among these, In₂Se₃is the interesting since it possesses ferroelectricity in 2D quintuple layers. Synthesis of large amounts of In₂Se₃crystals with the desired phase, however, has not been previously achieved. Here, the gram‐scale synthesis of α‐In₂Se₃crystals using a flash‐within‐flash Joule heating method is demonstrated. This approach allows the synthesis of single‐phase α‐In₂Se₃crystals regardless of the conductance of precursors in the inner tube and enables the synthesis of gram‐scale quantities of α‐In₂Se₃crystals. Then, α‐In₂Se₃flakes are fabricated and used as a 2D ferroelectric semiconductor FET artificial synaptic device platform. By modulating the degree of polarization in α‐In₂Se₃flakes according to the gate electrical pulses, these devices exhibit distinct essential synaptic behaviors. Their synaptic performance shows excellent and robust reliability under repeated electrical pulses. Finally, it is demonstrated that the synaptic devices achieve an estimated learning accuracy of up to ≈87% for Modified National Institute of Standards and Technology patterns in a single‐layer neural network system. 

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4. Understanding Microscopic Operating Mechanisms of a van der Waals Planar Ferroelectric Memristor

   https://doi.org/10.1002/adfm.202009999  

   Gabel, Matthew; Gu, Yi (December 2020, Advanced Functional Materials)

   Abstract Ferroelectric memristors represent a promising new generation of devices that have a wide range of applications in memory, digital information processing, and neuromorphic computing. Recently, van der Waals ferroelectric In₂Se₃with unique interlinked out‐of‐plane and in‐plane polarizations has enabled multidirectional resistance switching, providing unprecedented flexibility in planar and vertical device integrations. However, the operating mechanisms of these devices have remained unclear. Here, through the demonstration of van der Waals In₂Se₃‐based planar ferroelectric memristors with the device resistance continuously tunable over three orders of magnitude, and by correlating device resistance states, ferroelectric domain configurations, and surface electric potential, the studies reveal that the resistive switching is controlled by the multidomain formations and the associated energy barriers between domains, as opposed to the commonly assumed Schottky barrier modulations at the metal‐ferroelectric interface. The findings reveal new device physics through elucidating the microscopic operating mechanisms of this new generation of devices, and provide a critical guide for future device development and integration efforts. 

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5. Silicon Microring Resonator Integrated Hafnium Zirconium Oxide Ferrophotonic Non-Volatile Memory

   https://doi.org/10.1021/acsphotonics.5c00930  

   Perera, Asela; Quach, Tristan; Shen, Jianhao; Njoka, Sheilah M; Drees, Angelica; Chakravarty, Swapnajit (July 2025, ACS Photonics)

   We experimentally demonstrate the heterogeneous integration of ferroelectric hafnium zirconium oxide (HZO) with a silicon photonic microring resonator and demonstrate two non-volatile states for data storage by switching the polarization of HZO. Capped by transparent conducting titanium doped indium oxide (ITiO), the device functions as a metal insulator semiconductor (MIS) capacitor and utilizes the refractive index modulation via carrier (hole) accumulation and the effect of trapped charges at the ferroelectric–silicon interface to create the non-volatile binary switching states. In contrast to electronic devices where trapped charges at the silicon–ferroelectric interface reduce the memory window, in our ferrophotonic device, trapped charges amplify the refractive index difference in the binary states due to effective screening of the silicon in inversion. By switching the applied bias from negative to positive, the optical power transmitted through the ring switches with 3.5 dB output power difference between the non-volatile set and reset states and 40 pJ switching energy at ±8 V. Preliminary results suggest a path toward achieving sub-1 V non-volatile ferrophotonic switching. 

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