Over the two decades, amorphous oxide semiconductors (AOSs) and their thin film transistor (TFT) channel application have been intensely explored to realize high performance, transparent and flexible displays due to their high field effect mobility (μFE=5-20 cm2/Vs), visible range optical transparency, and low temperature processability (25-300 °C).[1-2] The metastable amorphous phase is to be maintained during operation by the addition of Zn and additional third cation species (e.g., Ga, Hf, or Al) as an amorphous phase stabilizer.[3-5] To limit TFT off-state currents, a thin channel layer (10-20 nm) was employed for InZnO (IZO)-based TFTs, or third cations were added to suppress carrier generations in the TFT channel. To resolve bias stress-induced instabilities in TFT performance, approaches to employ defect passivation layers or enhance channel/dielectric interfacial compatibility were demonstrated.[6-7]
Metallization contact is also a dominating factor that determines the performance of TFTs. Particularly, it has been reported that high electrical contact resistance significantly sacrifices drain bias applied to the channel, which leads to undesirable power loss during TFT operation and issues for the measurement of TFT field effect mobilities. [2, 8] However, only a few reports that suggest strategies to enhance contact behaviors are available in the literature. Furthermore, the previous approaches (1) require an additional fabrication complexity due to the use of additional treatments at relatively harsh conditions such as UV, plasma, or high temperatures, and (2) may lead to adverse effects on the channel material attributed to the chemical incompatibility between dissimilar materials, and exposures to harsh environments. Therefore, a simple and easy but effective buffer strategy, which does not require any additional process complexities and not sacrifice chemical compatibility, needs to be established to mitigate the contact issues and therefore achieve high performance and low power consumption AOS TFTs.
The present study aims to demonstrate an approach utilizing an interfacial buffer layer, which is compositionally homogeneous to the channel to better align work functions between channel and metallization without a significant fabrication complexity and harsh treatment conditions. Photoelectron spectroscopic measurements reveal that the conducting IZO buffer, of which the work function (Φ) is 4.37 eV, relaxes a relatively large Φ difference between channel IZO (Φ=4.81 eV) and Ti (Φ=4.2-4.3 eV) metallization. The buffer is found to lower the energy barrier for charge carriers at the source to reach the effective channel region near the dielectric. In addition, the higher carrier density of the buffer and favorable chemical compatibility with the channel (compositionally the same) further contribute to a significant reduction in specific contact resistance as much as more than 2.5 orders of magnitude. The improved contact and carrier supply performance from the source to the channel lead to an enhanced field effect mobility of up to 56.49 cm2/Vs and a threshold voltage of 1.18 V, compared to 13.41 cm2/Vs and 7.44 V of IZO TFTs without a buffer. The present work is unique in that an approach to lower the potential barrier between the source and the effective channel region (located near the channel/dielectric interface, behaving similar to a buried-channel MOSFET [9]) by introducing a contact buffer layer that enhances the field effect mobility and facilitates carrier supply from the source to the effective channel region.
more »
« less
Tailoring Threshold Voltage in Indium‐Zinc‐Oxide Thin‐Film Transistors by Inserting a 2‐(4‐Biphenylyl)‐5‐(4‐tert‐butylphenyl)‐1,3,4‐oxadiazole Buffer Layer
The authors investigate solution‐processed indium‐zinc‐oxide (IZO) thin‐film transistors (TFTs) into which the authors insert a 2‐(4‐biphenylyl)‐5‐(4‐tert‐butylphenyl)‐1,3,4‐oxadiazole (PBD) buffer layer. The proposed buffer layer tune an efficient energy level between the oxide semiconducting channel and metal electrode by increasing the charge extraction, thereby shifting the threshold voltage from 3.52 V to 8.96 V and enhancing overall device performance. In particular, based on 10‐nm‐thick PBD film, the IZO TFTs exhibit an excellent result and show a field‐effect mobility of 2.07 cm2 Vs−1, a high Ion/Ioffratio of 1.3 × 107, a threshold voltage of 6.36 V, and a subthreshold swing of 0.53 V dec−1.
- NSF-PAR ID:
- 10237920
- Publisher / Repository:
- Wiley Blackwell (John Wiley & Sons)
- Date Published:
- Journal Name:
- physica status solidi (a)
- Volume:
- 215
- Issue:
- 16
- ISSN:
- 1862-6300
- Format(s):
- Medium: X
- Sponsoring Org:
- National Science Foundation
More Like this
-
-
more » « less
It has been challenging to synthesize p-type SnOx(1≤x<2) and engineer the electrical properties such as carrier density and mobility due to the narrow processing window and the localized oxygen 2p orbitals near the valence band.
We recently reported on the processing of p-type SnOx and an oxide-based p-n heterostructures, demonstrating high on/off rectification ratio (>103), small turn-on voltage (<0.5 V), and low saturation current (~1×10-10A)1. In order to further understand the p-type oxide and engineer the properties for various electronic device applications, it is important to identify (or establish) the dominating doping and transport mechanisms. The low dopability in p-type SnOx, of which the causation is also closely related to the narrow processing window, needs to be mitigated so that the electrical properties of the material are to be adequately engineered2, 3.
Herein, we report on the multifunctional encapsulation of p-SnOxto limit the surface adsorption of oxygen and selectively permeate hydrogen into the p-SnOxchannel for thin film transistor (TFT) applications. Time-of-flight secondary ion mass spectrometry measurements identified that ultra-thin SiO2as a multifunctional encapsulation layer effectively suppressed the oxygen adsorption on the back channel surface of p-SnOxand augmented hydrogen density across the entire thickness of the channel. Encapsulated p-SnOx-based TFTs demonstrated much-enhanced channel conductance modulation in response to the gate bias applied, featuring higher on-state current and lower off-state current. The relevance between the TFT performance and the effects of oxygen suppression and hydrogen permeation is discussed in regard to the intrinsic and extrinsic doping mechanisms. These results are supported by density-functional-theory calculations.
Acknowledgement This work was supported by the U.S. National Science Foundation (NSF) Award No. ECCS-1931088. S.L. and H.W.S. acknowledge the support from the Improvement of Measurement Standards and Technology for Mechanical Metrology (Grant No. 20011028) by KRISS. K.N. was supported by Basic Science Research Program (NRF-2021R11A1A01051246) through the NRF Korea funded by the Ministry of Education.
References Lee, D. H.; Park, H.; Clevenger, M.; Kim, H.; Kim, C. S.; Liu, M.; Kim, G.; Song, H. W.; No, K.; Kim, S. Y.; Ko, D.-K.; Lucietto, A.; Park, H.; Lee, S., High-Performance Oxide-Based p–n Heterojunctions Integrating p-SnOx and n-InGaZnO.
ACS Applied Materials & Interfaces 2021, 13 (46), 55676-55686.Hautier, G.; Miglio, A.; Ceder, G.; Rignanese, G.-M.; Gonze, X., Identification and design principles of low hole effective mass p-type transparent conducting oxides.
Nat Commun 2013, 4 .Yim, K.; Youn, Y.; Lee, M.; Yoo, D.; Lee, J.; Cho, S. H.; Han, S., Computational discovery of p-type transparent oxide semiconductors using hydrogen descriptor.
npj Computational Materials 2018, 4 (1), 17.Figure 1
-
more » « less
Abstract Earth‐abundant and air‐stable Cu2BaSnS4−
x Sex (CBTSSe) and related thin‐film absorbers are regarded as prospective options to meet the increasing demand for low‐cost solar cell deployment. Devices based on vacuum‐deposited CBTSSe absorbers have achieved record power conversion efficiency (PCE) of 5.2% based on a conventional device structure using CdS buffer and i‐ZnO/indium tin oxide (ITO) window layers, with open‐circuit voltage (V OC) posing the major bottleneck for improving solar cell performance. The current study demonstrates a >20% improvement inV OC(from 0.62 to 0.75 V) and corresponding enhancement in PCE (from 5.1% to 6.2% without antireflection coating; to 6.5% with MgF2antireflection coating) for solution‐deposited CBTSSe solar cells. This performance improvement is realized by introducing an alternative successive ionic layer adsorption and reaction‐deposited Zn1−x Cdx S buffer combined with sputtered Zn1−x Mgx O/Al‐doped ZnO window/top contact layer, which offers lower electron affinities relative to the conventional CdS/i‐ZnO/ITO stack and better matching with the low electron affinity of CBTSSe. A combined experimental (temperature‐ and light intensity‐dependentV OCmeasurements) and device simulation (SCAPS‐1D) evaluation points to the importance of addressing relative band offsets for both the buffer and window layers relative to the absorber in mitigating interfacial recombination and optimizing CBTSSe solar cell performance. -
more » « less
Metal oxide (MO) semiconductor thin films prepared from solution typically require multiple hours of thermal annealing to achieve optimal lattice densification, efficient charge transport, and stable device operation, presenting a major barrier to roll-to-roll manufacturing. Here, we report a highly efficient, cofuel-assisted scalable combustion blade-coating (CBC) process for MO film growth, which involves introducing both a fluorinated fuel and a preannealing step to remove deleterious organic contaminants and promote complete combustion. Ultrafast reaction and metal–oxygen–metal (M-O-M) lattice condensation then occur within 10–60 s at 200–350 °C for representative MO semiconductor [indium oxide (In2O3), indium-zinc oxide (IZO), indium-gallium-zinc oxide (IGZO)] and dielectric [aluminum oxide (Al2O3)] films. Thus, wafer-scale CBC fabrication of IGZO-Al2O3thin-film transistors (TFTs) (60-s annealing) with field-effect mobilities as high as ∼25 cm2V−1s−1and negligible threshold voltage deterioration in a demanding 4,000-s bias stress test are realized. Combined with polymer dielectrics, the CBC-derived IGZO TFTs on polyimide substrates exhibit high flexibility when bent to a 3-mm radius, with performance bending stability over 1,000 cycles.
-
more » « less
The study investigates the mitigation of radiation damage on p‐type SnO thin‐film transistors (TFTs) with a fast, room‐temperature annealing process. Atomic layer deposition is utilized to fabricate bottom‐gate TFTs of high‐quality p‐type SnO layers. After 2.8 MeV Au4+irradiation at a fluence level of 5.2 × 1012 ions cm−2, the output drain current and on/off current ratio (
I on/I off) decrease by more than one order of magnitude, field‐effect mobility (μ FE) reduces more than four times, and subthreshold swing (SS) increases more than four times along with a negative shift in threshold voltage. The observed degradation is attributed to increased surface roughness and defect density, as confirmed by scanning electron microscopy (SEM), high‐resolution micro‐Raman, and transmission electron microscopy (TEM) with geometric phase analysis (GPA). A technique is demonstrated to recover the device performance at room temperature and in less than a minute, using the electron wind force (EWF) obtained from low‐duty‐cycle high‐density pulsed current. At a pulsed current density of 4.0 × 105 A cm−2, approximately four times increase inI on/I offis observed, 41% increase inμ FE, and 20% decrease in the SS of the irradiated TFTs, suggesting effectiveness of the new annealing technique.
