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Abstract Defect mitigation of electronic devices is conventionally achieved using thermal annealing. To mobilize the defects, very high temperatures are necessary. Since thermal diffusion is random in nature, the process may take a prolonged period of time. In contrast, we demonstrate a room temperature annealing technique that takes only a few seconds. The fundamental mechanism is defect mobilization by atomic scale mechanical force originating from very high current density but low duty cycle electrical pulses. The high-energy electrons lose their momentum upon collision with the defects, yet the low duty cycle suppresses any heat accumulation to keep the temperature ambient. For a 7 × 105A cm−2pulsed current, we report an approximately 26% reduction in specific on-resistance, a 50% increase of the rectification ratio with a lower ideality factor, and reverse leakage current for as-fabricated vertical geometry GaN p–n diodes. We characterize the microscopic defect density of the devices before and after the room temperature processing to explain the improvement in the electrical characteristics. Raman analysis reveals an improvement in the crystallinity of the GaN layer and an approximately 40% relaxation of any post-fabrication residual strain compared to the as-received sample. Cross-sectional transmission electron microscopy (TEM) images and geometric phase analysis results of high-resolution TEM images further confirm the effectiveness of the proposed room temperature annealing technique to mitigate defects in the device. No detrimental effect, such as diffusion and/or segregation of elements, is observed as a result of applying a high-density pulsed current, as confirmed by energy dispersive x-ray spectroscopy mapping.
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Mitigating Heavy Ion Irradiation‐Induced Degradation in p‐type SnO Thin‐Film Transistors at Room Temperature
The study investigates the mitigation of radiation damage on p‐type SnO thin‐film transistors (TFTs) with a fast, room‐temperature annealing process. Atomic layer deposition is utilized to fabricate bottom‐gate TFTs of high‐quality p‐type SnO layers. After 2.8 MeV Au4+irradiation at a fluence level of 5.2 × 1012 ions cm−2, the output drain current and on/off current ratio (Ion/Ioff) decrease by more than one order of magnitude, field‐effect mobility (μFE) reduces more than four times, and subthreshold swing (SS) increases more than four times along with a negative shift in threshold voltage. The observed degradation is attributed to increased surface roughness and defect density, as confirmed by scanning electron microscopy (SEM), high‐resolution micro‐Raman, and transmission electron microscopy (TEM) with geometric phase analysis (GPA). A technique is demonstrated to recover the device performance at room temperature and in less than a minute, using the electron wind force (EWF) obtained from low‐duty‐cycle high‐density pulsed current. At a pulsed current density of 4.0 × 105 A cm−2, approximately four times increase inIon/Ioffis observed, 41% increase inμFE, and 20% decrease in the SS of the irradiated TFTs, suggesting effectiveness of the new annealing technique.
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- Award ID(s):
- 2015795
- PAR ID:
- 10468090
- Publisher / Repository:
- Wiley Blackwell (John Wiley & Sons)
- Date Published:
- Journal Name:
- physica status solidi (a)
- Volume:
- 220
- Issue:
- 19
- ISSN:
- 1862-6300
- Format(s):
- Medium: X
- Sponsoring Org:
- National Science Foundation
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