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Title: A Novel Low Loss 3D System-in-Package Approach for 60GHz Antenna on Chip Applications
This paper presents a novel low loss 3D system in package (SiP) approach for achieving antenna-on-chip integration. Specifically, this design uses 3D through silicon via (TSV) technology to achieve a vertical SiP phased array radio. The fully integrated package consists of a digital baseband chip, a radio frequency integrated circuit (RFIC), and lastly a microstrip patch phased array. The 3D TSVs achieve an insertion loss of less than 0.4 dB/pair at millimeter-wave frequencies. The differential fed microstrip patch array achieves a return loss of 40 dB at a 60 GHz center frequency with 4 GHz instantaneous bandwidth. The antenna array achieves an E and H plane realized gain of 17.1 dBi for a 4×4 element design. In addition, this design approach enables individual fabrication of each element to maximize yield with low cost assembly using ball grid array (BGA) technology. Lastly, this design does not require special design rules that comprise either transistor or antenna performance as compared to other methods outlined in antenna on chip design.  more » « less
Award ID(s):
1816112
PAR ID:
10295748
Author(s) / Creator(s):
; ;
Date Published:
Journal Name:
2020 IEEE 63rd International Midwest Symposium on Circuits and Systems (MWSCAS)
ISSN:
1558-3899
Format(s):
Medium: X
Sponsoring Org:
National Science Foundation
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