skip to main content
US FlagAn official website of the United States government
dot gov icon
Official websites use .gov
A .gov website belongs to an official government organization in the United States.
https lock icon
Secure .gov websites use HTTPS
A lock ( lock ) or https:// means you've safely connected to the .gov website. Share sensitive information only on official, secure websites.

Explore Research Products in the PAR
It may take a few hours for recently added research products to appear in PAR search results.


Title: Hybrid PUF for Counterfeit Mitigation
A subthreshold hybrid PUF-embedded authentication circuit is proposed to mitigate the financial incentives that drive the counterfeit community and to encourage the COTS manufacturers to use authentication for system identification in their parts. The proposed hybrid PUF with cross-coupled inverters and a delay-based PUF strategy has sufficient entropy for authentication and a reduced number of transistors per bit. The area efficient fingerprint circuit does not require additional die area, pins, or power overhead. The performance of the primary circuit is unaffected by the fingerprint circuit. The hybrid circuit designed in a 65 nm CMOS process is discussed.  more » « less
Award ID(s):
1814516
PAR ID:
10310319
Author(s) / Creator(s):
; ;
Date Published:
Journal Name:
Proceedings GOMACTech
Format(s):
Medium: X
Sponsoring Org:
National Science Foundation
More Like this
  1. (, Proceedings of the IEEE National Aerospace and Electronics Conference NAECON)
    A simple PUF-based authentication circuit is proposed that will lower the entry barrier for counterfeit countermeasures by COTs manufacturers of integrated circuits. The on-chip fingerprint circuit does not require additional die area, I/O pins, or a separate read-out circuit. This approach to assuring integrity in the semiconductor supply chain will result in negative financial incentives for counterfeiters. An 80 bit authentication circuit which includes a 16 bit frame header has been designed in a UMC 65nm process with an area estimate of 0.01 mm2. 
    more » « less
  2. (, Proceedings of the IEEE National Aerospace and Electronics Conference NAECON)
    A simple PUF-based authentication circuit is proposed that will lower the entry barrier for counterfeit countermeasures by COTs manufacturers of integrated circuits. The on-chip fingerprint circuit does not require additional die area, I/O pins, or a separate read-out circuit. This approach to assuring integrity in the semiconductor supply chain will result in negative financial incentives for counterfeiters. An 80 bit authentication circuit which includes a 16 bit frame header has been designed in a UMC 65nm process with an area estimate of 0.01 mm2. 
    more » « less
  3. (, Government Microelectronic Applications and Technology Conference)
    A simple and compact authentication circuit based on a 4T bit cell is proposed for counterfeit detection and avoidance. The PUF-based authentication circuit has been designed to reduce or eliminate the reluctance of COTs manufacturers to include onchip fingerprints by not requiring additional die area, I/O pins, or read-out circuits and by using a deep-sleep mode during normal circuit operation so that it does not interfere with operation of the main IC. 
    more » « less
  4. ; ; ; (, Applied Physics Letters)
    Fano resonance with an asymmetric and ultrasharp resonant line shape has been extensively studied in various light scattering scenes, unlocking several applications for sensing, information processing, and optical identification. Fano resonance appearing in multilayered nanoparticles (NPs) is particularly intriguing as its sharp and comb-like resonant line shape may enable optical identification at the nanoscale. We herein propose the concept of the optical physical unclonable function (PUF) based on the scattering responses of core–shell (plasmonic-dielectric) NPs. Specifically, the sharp, asymmetric spectral responses near the Fano resonance frequency, which are highly sensitive to perturbations (e.g., nanomanufacturing imperfections), can be exploited as a unique electromagnetic fingerprint for PUF-based identification and anti-counterfeiting applications. Here, we theoretically and statistically demonstrate that scattering from Fano-resonant multilayered NPs can be regarded as a perfect entropy source for the generation of PUF encryption keys, with outstanding performance in terms of uniqueness, randomness, encoding capacity, and NIST randomness test results. The proposed optical PUF opens pathways to implement nano-tags for optical identification, authentication, and anti-counterfeiting applications. 
    more » « less
  5. ; (, IEEE)
    Physical Unclonable Functions (PUFs) leverage manufacturing process imperfections that cause propagation delay discrepancies for the signals traveling along these paths. While PUFs can be used for device authentication and chip-specific key generation, strong PUFs have been shown to be vulnerable to machine learning modeling attacks. Although there is an impression that combinational circuits must be designed without any loops, cyclic combinational circuits have been shown to increase design security against hardware intellectual property theft. In this paper, we introduce feedback signals into traditional delay-based PUF designs such as arbiter PUF, ring oscillator PUF, and butterfly PUF to give them a wider range of possible output behaviors and thus an edge against modeling attacks. Based on our analysis, cyclic PUFs produce responses that can be binary, steady-state, oscillating, or pseudo-random under fixed challenges. The proposed cyclic PUFs are implemented in field programmable gate arrays, and their power and area overhead, in addition to functional metrics, are reported compared with their traditional counterparts. The security gain of the proposed cyclic PUFs is also shown against state-of-the-art attacks. 
    more » « less
  • Citation Formats
  • MLA
  • APA
  • Chicago
  • BibTeX
  • Save / Share this Record
  • Send to Email